support "discard";

2 files changed, 16 insertions, 0 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index 4143d5be6cb..931c0038d41 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -237,6 +237,7 @@ struct brw_wm_compile {
 	struct brw_reg reg;
    } wm_regs[PROGRAM_PAYLOAD+1][256][4];
    struct brw_reg ret_reg;
+   struct brw_reg emit_mask_reg;
    GLuint reg_index;
    GLuint tmp_index;
 };
diff --git a/src/mesa/drivers/dri/i965/brw_wm_glsl.c b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
index cdd79766076..4988df2b0e4 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_glsl.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
@@ -132,6 +132,7 @@ static void prealloc_reg(struct brw_wm_compile *c)
     c->prog_data.urb_read_length = nr_interp_regs * 2;
     c->prog_data.curb_read_length = c->nr_creg;
     c->ret_reg = brw_uw1_reg(BRW_GENERAL_REGISTER_FILE, c->reg_index, 0);
+    c->emit_mask_reg = brw_uw1_reg(BRW_GENERAL_REGISTER_FILE, c->reg_index, 1);
     c->reg_index++;
 }
 
@@ -768,6 +769,17 @@ static void emit_lrp(struct brw_wm_compile *c,
     }
 }
 
+static void emit_kil(struct brw_wm_compile *c)
+{
+	struct brw_compile *p = &c->func;
+	struct brw_reg depth = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW);
+	brw_push_insn_state(p);
+	brw_set_mask_control(p, BRW_MASK_DISABLE);
+	brw_NOT(p, c->emit_mask_reg, brw_mask_reg(1)); //IMASK
+	brw_AND(p, depth, c->emit_mask_reg, depth);
+	brw_pop_insn_state(p);
+}
+
 static void emit_mad(struct brw_wm_compile *c,
 		struct prog_instruction *inst)
 {
@@ -1107,6 +1119,9 @@ static void brw_wm_emit_glsl(struct brw_wm_compile *c)
 	    case OPCODE_TXB:
 		emit_txb(c, inst);
 		break;
+	    case OPCODE_KIL_NV:
+		emit_kil(c);
+		break;
 	    case OPCODE_IF:
 		assert(if_insn < MAX_IFSN);
 		if_inst[if_insn++] = brw_IF(p, BRW_EXECUTE_8);