diff options
| author | Dave Airlie <[email protected]> | 2017-05-06 21:14:11 +0100 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2017-05-07 11:17:48 +0100 |
| commit | 2add79a73291e40621081b9a12938ac1931b9e96 (patch) | |
| tree | 1d3d3fcb9f9c8e61ed98201cc997eb2f9eba54fb | |
| parent | ccf9669cc1c0d4a5b669d36ae981ebd5e5a196ae (diff) | |
radv: apply the tess+GS hang workaround to Polaris12 as well
As I pointed out for radeonsi, and AMD confirmed, so fix this
in radv as well.
Cc: "17.1" <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
| -rw-r--r-- | src/amd/vulkan/si_cmd_buffer.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index 1382272d71b..d94e23b975f 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -672,7 +672,8 @@ si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer, if (family == CHIP_TONGA || family == CHIP_FIJI || family == CHIP_POLARIS10 || - family == CHIP_POLARIS11) + family == CHIP_POLARIS11 || + family == CHIP_POLARIS12) partial_vs_wave = true; } else { partial_vs_wave = true; |