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authorBen Crocker <[email protected]>2017-09-28 14:09:13 -0400
committerRoland Scheidegger <[email protected]>2017-10-05 02:14:14 +0200
commit1359af930ee5baf8444b0acc3d55b1e5e1a3879e (patch)
treeb0c8a94ecb34a929d341b5a6ce391748e5cfffd5
parente93f056a4e5babde516c9ef53ae3547f68f1b824 (diff)
gallivm/ppc64le: allow environmental control of Altivec code generation
In check_os_altivec_support(), allow control of Altivec (first PPC vector instruction set) code generation via a new environmental control, GALLIVM_ALTIVEC, which is expected to take on a value of 1 or 0. The default is to enable Altivec code generation. This environmental control of Altivec code generation is initially available only #ifdef DEBUG. Cc: "17.2" <[email protected]> Signed-off-by: Ben Crocker <[email protected]> Acked-by: Roland Scheidegger <[email protected]>
-rw-r--r--src/gallium/auxiliary/util/u_cpu_detect.c32
1 files changed, 24 insertions, 8 deletions
diff --git a/src/gallium/auxiliary/util/u_cpu_detect.c b/src/gallium/auxiliary/util/u_cpu_detect.c
index 4e71041bc9a..6a59f271a83 100644
--- a/src/gallium/auxiliary/util/u_cpu_detect.c
+++ b/src/gallium/auxiliary/util/u_cpu_detect.c
@@ -132,16 +132,32 @@ check_os_altivec_support(void)
if (setjmp(__lv_powerpc_jmpbuf)) {
signal(SIGILL, SIG_DFL);
} else {
- __lv_powerpc_canjump = 1;
+ boolean enable_altivec = TRUE; /* Default: enable if available, and if not overridden */
+#ifdef DEBUG
+ /* Disabling Altivec code generation is not the same as disabling VSX code generation,
+ * which can be done simply by passing -mattr=-vsx to the LLVM compiler; cf.
+ * lp_build_create_jit_compiler_for_module().
+ * If you want to disable Altivec code generation, the best place to do it is here.
+ */
+ char *env_control = getenv("GALLIVM_ALTIVEC"); /* 1=enable (default); 0=disable */
+ if (env_control && env_control[0] == '0') {
+ enable_altivec = FALSE;
+ }
+#endif
+ if (enable_altivec) {
+ __lv_powerpc_canjump = 1;
- __asm __volatile
- ("mtspr 256, %0\n\t"
- "vand %%v0, %%v0, %%v0"
- :
- : "r" (-1));
+ __asm __volatile
+ ("mtspr 256, %0\n\t"
+ "vand %%v0, %%v0, %%v0"
+ :
+ : "r" (-1));
- signal(SIGILL, SIG_DFL);
- util_cpu_caps.has_altivec = 1;
+ signal(SIGILL, SIG_DFL);
+ util_cpu_caps.has_altivec = 1;
+ } else {
+ util_cpu_caps.has_altivec = 0;
+ }
}
#endif /* !PIPE_OS_APPLE */
}