diff options
| author | Kenneth Graunke <[email protected]> | 2015-02-25 16:08:14 -0800 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2015-02-27 11:36:24 -0800 |
| commit | ea696be5ac097af621f10858d925a343a838be7a (patch) | |
| tree | 5fe6df5a13c0a89529f8e5e09ba602ebf3dab9d4 | |
| parent | 4ebacf8aa67b1bfba7820f25536be98c7452dcb1 (diff) | |
i965/fs: Patch the instruction generating discards; don't use CMP.Z.
CMP.Z doesn't work on Gen4-5 because the boolean isn't guaranteed to be
0 or 0xFFFFFFFF - only the low bit is defined.
We can call emit_bool_to_cond_code to generate the condition in f0.0;
the last instruction will generate the flag value. We can patch it to
use f0.1, and negate the condition.
Fixes discard tests on Gen4-5.
Haswell shader-db stats:
total instructions in shared programs: 5770279 -> 5769112 (-0.02%)
instructions in affected programs: 64342 -> 63175 (-1.81%)
helped: 1069
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp index 13a3bf29da8..7a697e898fe 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp @@ -2422,8 +2422,9 @@ fs_visitor::visit(ir_discard *ir) */ fs_inst *cmp; if (ir->condition) { - ir->condition->accept(this); - cmp = emit(CMP(reg_null_f, this->result, fs_reg(0), BRW_CONDITIONAL_Z)); + emit_bool_to_cond_code(ir->condition); + cmp = (fs_inst *) this->instructions.get_tail(); + cmp->conditional_mod = brw_negate_cmod(cmp->conditional_mod); } else { fs_reg some_reg = fs_reg(retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UW)); |