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authorPaul Berry <[email protected]>2012-06-22 20:27:18 -0700
committerPaul Berry <[email protected]>2012-06-26 07:45:54 -0700
commitbc53e14d98de11593788d302c0bb198e3a2097a4 (patch)
tree026c5011395bc36423ca206fbd8619910eb95949
parent9ea60ce58f8494e0b79771f93227f4b8181731de (diff)
i965/msaa: Implement GL_SAMPLE_ALPHA_TO_{COVERAGE,ONE}.
This patch enables the multisampling parameters GL_SAMPLE_ALPHA_TO_COVERAGE and GL_SAMPLE_ALPHA_TO_ONE, which allow the fragment shader's alpha output to be converted into a sample coverage mask and ignored for blending. i965 supports these parameters through the BLEND_STATE structure. The GL spec allows, but does not require, the implementation to dither the conversion from alpha to a sample coverage mask, so that alpha values that aren't a multiple of 1/num_samples result in the correct proportion of samples being lit. A bit exists in the BLEND_STATE structure to enable this functionality, but according to the hardware docs it must be disabled on Sandy Bridge (see the Sandy Bridge PRM, Vol2, Part1, p379: AlphaToCoverage Dither Enable). So it is enabled for Gen7 only. Fixes piglit tests "EXT_framebuffer_multisample/sample-alpha-to-{coverage,one} {2,4}". Reviewed-by: Anuj Phogat <[email protected]>
-rw-r--r--src/mesa/drivers/dri/i965/gen6_cc.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_cc.c b/src/mesa/drivers/dri/i965/gen6_cc.c
index b4c5329772f..e0523efdc70 100644
--- a/src/mesa/drivers/dri/i965/gen6_cc.c
+++ b/src/mesa/drivers/dri/i965/gen6_cc.c
@@ -161,6 +161,13 @@ gen6_upload_blend_state(struct brw_context *brw)
blend[b].blend1.write_disable_g = !ctx->Color.ColorMask[b][1];
blend[b].blend1.write_disable_b = !ctx->Color.ColorMask[b][2];
blend[b].blend1.write_disable_a = !ctx->Color.ColorMask[b][3];
+
+ /* _NEW_MULTISAMPLE */
+ blend[b].blend1.alpha_to_coverage =
+ ctx->Multisample._Enabled && ctx->Multisample.SampleAlphaToCoverage;
+ blend[b].blend1.alpha_to_one =
+ ctx->Multisample._Enabled && ctx->Multisample.SampleAlphaToOne;
+ blend[b].blend1.alpha_to_coverage_dither = (brw->intel.gen >= 7);
}
brw->state.dirty.cache |= CACHE_NEW_BLEND_STATE;
@@ -169,7 +176,8 @@ gen6_upload_blend_state(struct brw_context *brw)
const struct brw_tracked_state gen6_blend_state = {
.dirty = {
.mesa = (_NEW_COLOR |
- _NEW_BUFFERS),
+ _NEW_BUFFERS |
+ _NEW_MULTISAMPLE),
.brw = BRW_NEW_BATCH,
.cache = 0,
},