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authorMarek Olšák <[email protected]>2014-09-23 17:25:41 +0200
committerMarek Olšák <[email protected]>2014-10-04 15:16:14 +0200
commit90611297fa9a84996a7915c588e92725272c0ce0 (patch)
tree5b4f8f2a3e1f9cbb0c3f105547d27efb46db3978
parent10e386f4aa3ef8ce1c60ec5be0865cc61bd093e2 (diff)
radeonsi: don't flush shader caches when building PM4 shader states
This is a wrong place to flush caches to say the least. I don't think we need to flush the instruction caches if we don't patch shaders with DMA. Reviewed-by: Michel Dänzer <[email protected]>
-rw-r--r--src/gallium/drivers/radeonsi/si_state_draw.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 2881199d56d..6ad2df0dbe0 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -75,8 +75,6 @@ static void si_shader_es(struct pipe_context *ctx, struct si_shader *shader)
S_00B328_VGPR_COMP_CNT(vgpr_comp_cnt));
si_pm4_set_reg(pm4, R_00B32C_SPI_SHADER_PGM_RSRC2_ES,
S_00B32C_USER_SGPR(num_user_sgprs));
-
- sctx->b.flags |= R600_CONTEXT_INV_SHADER_CACHE;
}
static void si_shader_gs(struct pipe_context *ctx, struct si_shader *shader)
@@ -147,8 +145,6 @@ static void si_shader_gs(struct pipe_context *ctx, struct si_shader *shader)
S_00B228_SGPRS((num_sgprs - 1) / 8));
si_pm4_set_reg(pm4, R_00B22C_SPI_SHADER_PGM_RSRC2_GS,
S_00B22C_USER_SGPR(num_user_sgprs));
-
- sctx->b.flags |= R600_CONTEXT_INV_SHADER_CACHE;
}
static void si_shader_vs(struct pipe_context *ctx, struct si_shader *shader)
@@ -223,8 +219,6 @@ static void si_shader_vs(struct pipe_context *ctx, struct si_shader *shader)
S_00B12C_SO_BASE2_EN(!!shader->selector->so.stride[2]) |
S_00B12C_SO_BASE3_EN(!!shader->selector->so.stride[3]) |
S_00B12C_SO_EN(!!shader->selector->so.num_outputs));
-
- sctx->b.flags |= R600_CONTEXT_INV_SHADER_CACHE;
}
static void si_shader_ps(struct pipe_context *ctx, struct si_shader *shader)
@@ -305,8 +299,6 @@ static void si_shader_ps(struct pipe_context *ctx, struct si_shader *shader)
si_pm4_set_reg(pm4, R_00B02C_SPI_SHADER_PGM_RSRC2_PS,
S_00B02C_EXTRA_LDS_SIZE(shader->lds_size) |
S_00B02C_USER_SGPR(num_user_sgprs));
-
- sctx->b.flags |= R600_CONTEXT_INV_SHADER_CACHE;
}
/*