diff options
| author | Jordan Justen <[email protected]> | 2014-11-05 00:47:41 -0800 |
|---|---|---|
| committer | Jordan Justen <[email protected]> | 2015-09-10 16:46:29 -0700 |
| commit | 34cff76fc2da1ce9abad6e2b1856fec6a950d19c (patch) | |
| tree | ff07e0c10a8255d38db80a5cedbecbe9518ab72f | |
| parent | b01d0473917ba15de3aa146006bfef5836d10e93 (diff) | |
i965/cs: Enable barrier in MEDIA_INTERFACE_DESCRIPTOR
Enable barrier in MEDIA_INTERFACE_DESCRIPTOR if the program uses the
barrier() GLSL function.
On Ivy Bridge and Haswell, this allows the piglit test
tests/spec/arb_compute_shader/execution/simple-barrier-atomics.shader_test
to pass. On gen8, this enables a similar test with a local group size
of 896 to pass.
Signed-off-by: Jordan Justen <[email protected]>
Reviewed-by: Kristian Høgsberg <[email protected]>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.h | 1 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_cs.cpp | 4 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_defines.h | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 2 |
4 files changed, 8 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 0318a3fb229..b05b8bd69bf 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -498,6 +498,7 @@ struct brw_cs_prog_data { GLuint dispatch_grf_start_reg_16; unsigned local_size[3]; unsigned simd_size; + bool uses_barrier; }; /** diff --git a/src/mesa/drivers/dri/i965/brw_cs.cpp b/src/mesa/drivers/dri/i965/brw_cs.cpp index 605a3fa0058..980ef52fe17 100644 --- a/src/mesa/drivers/dri/i965/brw_cs.cpp +++ b/src/mesa/drivers/dri/i965/brw_cs.cpp @@ -431,7 +431,9 @@ brw_upload_cs_state(struct brw_context *brw) SET_FIELD(threads, GEN8_MEDIA_GPGPU_THREAD_COUNT) : SET_FIELD(threads, MEDIA_GPGPU_THREAD_COUNT); assert(threads <= brw->max_cs_threads); - desc[dw++] = media_threads; + desc[dw++] = + SET_FIELD(cs_prog_data->uses_barrier, MEDIA_BARRIER_ENABLE) | + media_threads; BEGIN_BATCH(4); OUT_BATCH(MEDIA_INTERFACE_DESCRIPTOR_LOAD << 16 | (4 - 2)); diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index d18f7ca4f73..8fc8cebf11e 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -2690,6 +2690,8 @@ enum brw_wm_barycentric_interp_mode { # define MEDIA_CURBE_READ_OFFSET_SHIFT 0 # define MEDIA_CURBE_READ_OFFSET_MASK INTEL_MASK(15, 0) /* GEN7 DW5, GEN8+ DW6 */ +# define MEDIA_BARRIER_ENABLE_SHIFT 21 +# define MEDIA_BARRIER_ENABLE_MASK INTEL_MASK(21, 21) # define MEDIA_GPGPU_THREAD_COUNT_SHIFT 0 # define MEDIA_GPGPU_THREAD_COUNT_MASK INTEL_MASK(7, 0) # define GEN8_MEDIA_GPGPU_THREAD_COUNT_SHIFT 0 diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index 1cc7b021928..8c3c4aed707 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp @@ -1705,6 +1705,8 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr case nir_intrinsic_barrier: emit_barrier(); + if (stage == MESA_SHADER_COMPUTE) + ((struct brw_cs_prog_data *) prog_data)->uses_barrier = true; break; default: |