radeon/llvm: Add subtarget feature: DumpCode

With this feature enabled, the LLVM backend will dump the MachineIntrs
prior to emitting code.  The mesa env variable R600_DUMP_SHADERS will enable
this feature in the backend.

5 files changed, 9 insertions, 6 deletions

diff --git a/src/gallium/drivers/radeon/AMDGPUTargetMachine.h b/src/gallium/drivers/radeon/AMDGPUTargetMachine.h
index d4165b09e84..7f621d88e0a 100644
--- a/src/gallium/drivers/radeon/AMDGPUTargetMachine.h
+++ b/src/gallium/drivers/radeon/AMDGPUTargetMachine.h
@@ -52,9 +52,6 @@ public:
                                               formatted_raw_ostream &Out,
                                               CodeGenFileType FileType,
                                               bool DisableVerify);
-public:
-   void dumpCode() { mDump = true; }
-   bool shouldDumpCode() const { return mDump; }
 };
 
 } /* End namespace llvm */
diff --git a/src/gallium/drivers/radeon/AMDILBase.td b/src/gallium/drivers/radeon/AMDILBase.td
index 2706b211f2d..31ebed31d72 100644
--- a/src/gallium/drivers/radeon/AMDILBase.td
+++ b/src/gallium/drivers/radeon/AMDILBase.td
@@ -60,6 +60,11 @@ def FeatureDebug : SubtargetFeature<"debug",
         "CapsOverride[AMDILDeviceInfo::Debug]",
         "true",
         "Debug mode is enabled, so disable hardware accelerated address spaces.">;
+def FeatureDumpCode : SubtargetFeature <"DumpCode",
+        "mDumpCode",
+        "true",
+        "Dump MachineInstrs in the CodeEmitter">;
+
 
 //===----------------------------------------------------------------------===//
 // Register File, Calling Conv, Instruction Descriptions
diff --git a/src/gallium/drivers/radeon/AMDILSubtarget.h b/src/gallium/drivers/radeon/AMDILSubtarget.h
index a4b0e34ada7..38fcb859ac6 100644
--- a/src/gallium/drivers/radeon/AMDILSubtarget.h
+++ b/src/gallium/drivers/radeon/AMDILSubtarget.h
@@ -42,6 +42,7 @@ namespace llvm {
       uint32_t mVersion;
       bool mIs64bit;
       bool mIs32on64bit;
+      bool mDumpCode;
     public:
       AMDILSubtarget(llvm::StringRef TT, llvm::StringRef CPU, llvm::StringRef FS);
       virtual ~AMDILSubtarget();
@@ -67,6 +68,7 @@ namespace llvm {
         ParseSubtargetFeatures(
             llvm::StringRef CPU,
             llvm::StringRef FS);
+      bool dumpCode() const { return mDumpCode; }
 
   };
 
diff --git a/src/gallium/drivers/radeon/R600CodeEmitter.cpp b/src/gallium/drivers/radeon/R600CodeEmitter.cpp
index 8faf0deb8c5..53fdd1592c4 100644
--- a/src/gallium/drivers/radeon/R600CodeEmitter.cpp
+++ b/src/gallium/drivers/radeon/R600CodeEmitter.cpp
@@ -155,10 +155,8 @@ bool R600CodeEmitter::runOnMachineFunction(MachineFunction &MF) {
   } else {
     evergreenEncoding = true;
   }
-  const AMDGPUTargetMachine *amdtm =
-    static_cast<const AMDGPUTargetMachine *>(&MF.getTarget());
 
-  if (amdtm->shouldDumpCode()) {
+  if (STM.dumpCode()) {
     MF.dump();
   }
 
diff --git a/src/gallium/drivers/radeon/radeon_llvm_emit.cpp b/src/gallium/drivers/radeon/radeon_llvm_emit.cpp
index b409cb2175e..3431316cd3c 100644
--- a/src/gallium/drivers/radeon/radeon_llvm_emit.cpp
+++ b/src/gallium/drivers/radeon/radeon_llvm_emit.cpp
@@ -105,6 +105,7 @@ radeon_llvm_compile(LLVMModuleRef M, unsigned char ** bytes,
    /* XXX: Use TargetMachine.Options in 3.0 */
    if (dump) {
       mod->dump();
+      FS += ",DumpCode";
    }
    PassManager PM;
    PM.add(new TargetData(*AMDGPUTargetMachine.getTargetData()));