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authorPaul Berry <[email protected]>2013-09-03 11:30:19 -0700
committerPaul Berry <[email protected]>2013-09-16 12:53:18 -0700
commit8c2b9bd1dfd482622260acbbc122bbfc8bd3bbf9 (patch)
tree2c5269d7dc6cdf9e3953c2204d8b22918a05d33f
parent8c69eaba1a8a5e8a82112eb5c51b2f8978dd2c23 (diff)
i965/fs: Consult brw_wm_prog_data::num_varying_inputs when setting up WM state.
Previously, we assumed that the number of varying inputs consumed by the fragment shader was equal to the number of bits set in gl_program::InputsRead. However, we'll soon be making two changes that will cause that not to be true: - We'll stop wasting varying input space for gl_FragCoord and gl_FrontFacing, which aren't varyings. - For fragment shaders that have more than 16 varying inputs, we'll adjust the layout of the inputs to account for the fact that the SF/SBE pipeline stage can't reorder inputs beyond the first 16; if there are GS outputs that the FS doens't use (or vice versa) this may cause the number of FS varying inputs to change. So, instead of trying to guess the number of FS inputs from gl_program::InputsRead, simply read it from brw_wm_prog_data:num_varying_inputs, which is guaranteed to be correct since it's populated by fs_visitor::calculate_urb_setup(). Reviewed-by: Kenneth Graunke <[email protected]>
-rw-r--r--src/mesa/drivers/dri/i965/gen6_wm_state.c3
-rw-r--r--src/mesa/drivers/dri/i965/gen7_wm_state.c5
2 files changed, 5 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c
index 2b9f19c629b..af1c044589a 100644
--- a/src/mesa/drivers/dri/i965/gen6_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c
@@ -188,7 +188,8 @@ upload_wm_state(struct brw_context *brw)
dw5 |= GEN6_WM_DISPATCH_ENABLE;
}
- dw6 |= _mesa_bitcount_64(brw->fragment_program->Base.InputsRead) <<
+ /* CACHE_NEW_WM_PROG */
+ dw6 |= brw->wm.prog_data->num_varying_inputs <<
GEN6_WM_NUM_SF_OUTPUTS_SHIFT;
if (multisampled_fbo) {
/* _NEW_MULTISAMPLE */
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c
index e7bb861d5d4..e9fe95f1f1e 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c
@@ -168,6 +168,7 @@ upload_ps_state(struct brw_context *brw)
* rendering, CurrentFragmentProgram is used for this check to
* differentiate between the GLSL and non-GLSL cases.
*/
+ /* BRW_NEW_FRAGMENT_PROGRAM */
if (ctx->Shader.CurrentFragmentProgram == NULL)
dw2 |= GEN7_PS_FLOATING_POINT_MODE_ALT;
@@ -191,8 +192,8 @@ upload_ps_state(struct brw_context *brw)
dw4 |= GEN7_PS_DUAL_SOURCE_BLEND_ENABLE;
}
- /* BRW_NEW_FRAGMENT_PROGRAM */
- if (brw->fragment_program->Base.InputsRead != 0)
+ /* CACHE_NEW_WM_PROG */
+ if (brw->wm.prog_data->num_varying_inputs != 0)
dw4 |= GEN7_PS_ATTRIBUTE_ENABLE;
dw4 |= GEN7_PS_8_DISPATCH_ENABLE;