diff options
| author | Lionel Landwerlin <[email protected]> | 2016-09-26 15:08:52 +0100 |
|---|---|---|
| committer | Lionel Landwerlin <[email protected]> | 2016-10-05 12:24:04 +0100 |
| commit | d51c1f9d51ef0e80873a9a32c48606cdce25a209 (patch) | |
| tree | a36f11f44b3d64a16581086cb84f80bf6eeaffdf | |
| parent | a40640f5303c9d03845459ecc364a3466d25cb5b (diff) | |
i965: use L3 data cache for SSBOs
Anv programs the hardware to use L3 data cache if we use either SSBOs or
images in the shaders, we can program i965 the same way.
gl_shader_program has a bit of a confusing named field with
'NumAtomicBuffers'. It doesn't tell how many buffers are accessed by the
shader in an atomic way but instead the number of atomic counters
manipulated by the shader.
Signed-off-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Francisco Jerez <[email protected]>
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen7_l3_state.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_l3_state.c b/src/mesa/drivers/dri/i965/gen7_l3_state.c index ad704916c29..0692b081b83 100644 --- a/src/mesa/drivers/dri/i965/gen7_l3_state.c +++ b/src/mesa/drivers/dri/i965/gen7_l3_state.c @@ -53,7 +53,8 @@ get_pipeline_state_l3_weights(const struct brw_context *brw) brw->ctx._Shader->CurrentProgram[stage_states[i]->stage]; const struct brw_stage_prog_data *prog_data = stage_states[i]->prog_data; - needs_dc |= (prog && prog->NumAtomicBuffers) || + needs_dc |= (prog && (prog->NumAtomicBuffers || + prog->NumShaderStorageBlocks)) || (prog_data && (prog_data->total_scratch || prog_data->nr_image_params)); needs_slm |= prog_data && prog_data->total_shared; } |