diff options
| author | Topi Pohjolainen <[email protected]> | 2016-04-01 16:18:27 +0300 |
|---|---|---|
| committer | Topi Pohjolainen <[email protected]> | 2016-04-23 07:29:15 +0300 |
| commit | c7cf17ae758eff27dee8e06cc315841b34d3fe0a (patch) | |
| tree | dd30242f6d579ee7e86e2976c063aa08626eabf5 | |
| parent | c4ec0121a8558e291c4d6a23a953f0fc34560249 (diff) | |
i965/blorp: Enable for normal color clears
Signed-off-by: Topi Pohjolainen <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_clear.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c index 841ba5d5a3f..d57b67737a3 100644 --- a/src/mesa/drivers/dri/i965/brw_clear.c +++ b/src/mesa/drivers/dri/i965/brw_clear.c @@ -239,6 +239,15 @@ brw_clear(struct gl_context *ctx, GLbitfield mask) } } + /* BLORP is currently only supported on Gen6+. */ + if (brw->gen >= 6 && (mask & BUFFER_BITS_COLOR)) { + const bool encode_srgb = ctx->Color.sRGBEnabled; + if (brw_blorp_clear_color(brw, fb, mask, partial_clear, encode_srgb)) { + debug_mask("blorp color", mask & BUFFER_BITS_COLOR); + mask &= ~BUFFER_BITS_COLOR; + } + } + /* Clear color buffers with fast clear or at least rep16 writes. */ if (brw->gen >= 6 && (mask & BUFFER_BITS_COLOR)) { if (brw_meta_fast_clear(brw, fb, mask, partial_clear)) { |