diff options
| author | Samuel Pitoiset <[email protected]> | 2018-01-24 12:31:40 +0100 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2018-01-26 12:14:27 +0100 |
| commit | b9e2f78d6e0cd7d562ffd9030768bd96ecc8ecd3 (patch) | |
| tree | f3dfebac5c36752f6516d0bfc3c249e0f8c43683 | |
| parent | c8949e24984266cca3593291c30ea199baef5358 (diff) | |
ac/nir: only canonicalize 32-bit float min/max outputs on pre-GFX9
According to LLVM, only pre-GFX9 targets do not flush denorms
for fmin/fmax.
All dEQP-VK.glsl.builtin.precision.* still pass.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
| -rw-r--r-- | src/amd/common/ac_nir_to_llvm.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 7b56edf8e78..581ccf63c9a 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -1913,18 +1913,24 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr) case nir_op_fmax: result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum", ac_to_float_type(&ctx->ac, def_type), src[0], src[1]); - if (instr->dest.dest.ssa.bit_size == 32) + if (ctx->ac.chip_class < GFX9 && + instr->dest.dest.ssa.bit_size == 32) { + /* Only pre-GFX9 chips do not flush denorms. */ result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize", ac_to_float_type(&ctx->ac, def_type), result); + } break; case nir_op_fmin: result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum", ac_to_float_type(&ctx->ac, def_type), src[0], src[1]); - if (instr->dest.dest.ssa.bit_size == 32) + if (ctx->ac.chip_class < GFX9 && + instr->dest.dest.ssa.bit_size == 32) { + /* Only pre-GFX9 chips do not flush denorms. */ result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize", ac_to_float_type(&ctx->ac, def_type), result); + } break; case nir_op_ffma: result = emit_intrin_3f_param(&ctx->ac, "llvm.fmuladd", |