diff options
| author | Chris Forbes <[email protected]> | 2013-10-13 12:20:03 +1300 |
|---|---|---|
| committer | Chris Forbes <[email protected]> | 2013-10-22 18:56:14 +1300 |
| commit | b38af01ccfb76dc39baf4d65b663300d81f144a2 (patch) | |
| tree | 3064d80dc34591fbb08aaf8c6edfb0df76800786 | |
| parent | f1e605f1ada79bb4d57187274096d44e270615a6 (diff) | |
i965/fs: Fix handling of sampler messages with header but zero offset
Gather unconditionally uses a header, but in some cases the
texture_offset value will be zero.
V2: Don't introduce a bogus conversion.
Signed-off-by: Chris Forbes <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp index fa15f7bac20..ed6130433b0 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp @@ -539,9 +539,17 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src brw_imm_ud(inst->texture_offset)); brw_pop_insn_state(p); } else if (inst->header_present) { - assert(brw->gen < 7); - /* Set up an implied move from g0 to the MRF. */ - src = retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UW); + if (brw->gen >= 7) { + /* Explicitly set up the message header by copying g0 to the MRF. */ + brw_push_insn_state(p); + brw_set_mask_control(p, BRW_MASK_DISABLE); + brw_set_compression_control(p, BRW_COMPRESSION_NONE); + brw_MOV(p, src, brw_vec8_grf(0, 0)); + brw_pop_insn_state(p); + } else { + /* Set up an implied move from g0 to the MRF. */ + src = retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UW); + } } uint32_t surface_index = (inst->opcode == SHADER_OPCODE_TG4 |