diff options
| author | Bas Nieuwenhuizen <[email protected]> | 2017-03-05 15:52:28 +0100 |
|---|---|---|
| committer | Bas Nieuwenhuizen <[email protected]> | 2017-03-09 02:35:23 +0100 |
| commit | 870032978512576f5ac882b2c88c7657c9f741f4 (patch) | |
| tree | 3a798cd26c14a4b8e1223441fe6a7fd30ab8579e | |
| parent | 9251f8b35ef081db65cb8c2018d7f8f4bc3c1be3 (diff) | |
radv: Don't emit cache flushes on subpass switch.
I think we should only flush right before an action (draw/dispatch etc.),
as otherwise it is too easy to issue redundant flushes.
Signed-off-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
| -rw-r--r-- | src/amd/vulkan/radv_cmd_buffer.c | 4 | ||||
| -rw-r--r-- | src/amd/vulkan/radv_meta_fast_clear.c | 1 | ||||
| -rw-r--r-- | src/amd/vulkan/radv_meta_resolve.c | 1 |
3 files changed, 0 insertions, 6 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 274495f134f..10c51427679 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -2265,8 +2265,6 @@ void radv_CmdBeginRenderPass( cmd_buffer->state.render_area = pRenderPassBegin->renderArea; radv_cmd_state_setup_attachments(cmd_buffer, pass, pRenderPassBegin); - si_emit_cache_flush(cmd_buffer); - radv_cmd_buffer_set_subpass(cmd_buffer, pass->subpasses, true); assert(cmd_buffer->cs->cdw <= cdw_max); @@ -2279,7 +2277,6 @@ void radv_CmdNextSubpass( { RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); - si_emit_cache_flush(cmd_buffer); radv_cmd_buffer_resolve_subpass(cmd_buffer); radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, @@ -2704,7 +2701,6 @@ void radv_CmdEndRenderPass( radv_subpass_barrier(cmd_buffer, &cmd_buffer->state.pass->end_barrier); - si_emit_cache_flush(cmd_buffer); radv_cmd_buffer_resolve_subpass(cmd_buffer); for (unsigned i = 0; i < cmd_buffer->state.framebuffer->attachment_count; ++i) { diff --git a/src/amd/vulkan/radv_meta_fast_clear.c b/src/amd/vulkan/radv_meta_fast_clear.c index ffaa9a3d5e8..8009b287c4d 100644 --- a/src/amd/vulkan/radv_meta_fast_clear.c +++ b/src/amd/vulkan/radv_meta_fast_clear.c @@ -405,7 +405,6 @@ emit_fast_clear_flush(struct radv_cmd_buffer *cmd_buffer, radv_CmdDraw(cmd_buffer_h, 3, 1, 0, 0); cmd_buffer->state.flush_bits |= (RADV_CMD_FLAG_FLUSH_AND_INV_CB | RADV_CMD_FLAG_FLUSH_AND_INV_CB_META); - si_emit_cache_flush(cmd_buffer); } /** diff --git a/src/amd/vulkan/radv_meta_resolve.c b/src/amd/vulkan/radv_meta_resolve.c index 288a1479deb..105270cb742 100644 --- a/src/amd/vulkan/radv_meta_resolve.c +++ b/src/amd/vulkan/radv_meta_resolve.c @@ -364,7 +364,6 @@ emit_resolve(struct radv_cmd_buffer *cmd_buffer, radv_CmdDraw(cmd_buffer_h, 3, 1, 0, 0); cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB; - si_emit_cache_flush(cmd_buffer); } void radv_CmdResolveImage( |