diff options
| author | Samuel Pitoiset <[email protected]> | 2017-12-14 15:51:20 +0100 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2017-12-14 22:20:59 +0100 |
| commit | 5a761167f53b53569a6d55d9436bdfec071b2b17 (patch) | |
| tree | b53eb705c852a2433865c7f330bb381c10a4ddc9 | |
| parent | 75b1c4997fe4de75dc4735937959c52f30f5c42b (diff) | |
radv: set FORCE_SIMD_DIST(1) for compute when profitable
Ported from RadeonSI.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
| -rw-r--r-- | src/amd/vulkan/radv_cmd_buffer.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index d6aaff707b5..4a048485c86 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -2561,6 +2561,7 @@ radv_emit_compute_pipeline(struct radv_cmd_buffer *cmd_buffer) { struct radv_shader_variant *compute_shader; struct radv_pipeline *pipeline = cmd_buffer->state.compute_pipeline; + struct radv_device *device = cmd_buffer->device; unsigned compute_resource_limits; unsigned waves_per_threadgroup; uint64_t va; @@ -2602,6 +2603,19 @@ radv_emit_compute_pipeline(struct radv_cmd_buffer *cmd_buffer) compute_resource_limits = S_00B854_SIMD_DEST_CNTL(waves_per_threadgroup % 4 == 0); + if (device->physical_device->rad_info.chip_class >= CIK) { + unsigned num_cu_per_se = + device->physical_device->rad_info.num_good_compute_units / + device->physical_device->rad_info.max_se; + + /* Force even distribution on all SIMDs in CU if the workgroup + * size is 64. This has shown some good improvements if # of + * CUs per SE is not a multiple of 4. + */ + if (num_cu_per_se % 4 && waves_per_threadgroup == 1) + compute_resource_limits |= S_00B854_FORCE_SIMD_DIST(1); + } + radeon_set_sh_reg(cmd_buffer->cs, R_00B854_COMPUTE_RESOURCE_LIMITS, compute_resource_limits); |