diff options
author | Jason Ekstrand <[email protected]> | 2017-06-13 14:27:37 -0700 |
---|---|---|
committer | Jason Ekstrand <[email protected]> | 2017-08-14 10:43:30 -0700 |
commit | 51600b848944d6cfafa79c3fd9f3fcf3e98f2bcb (patch) | |
tree | c29b026558db5487673436fa431409d1a94329cf | |
parent | 8f6e54c92966bb94a3f05f2cc7ea804273e125ad (diff) |
i965/miptree: More conservatively resolve external images
Instead of always doing a full resolve, only resolve the bits that are
needed. This means that we only do a partial resolve when the miptree
modifier is I915_FORMAT_MOD_Y_TILED_CCS.
Reviewed-by: Topi Pohjolainen <[email protected]>
Reviewed-by: Chad Versace <[email protected]>
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 36 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 10 |
3 files changed, 47 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 2d8f34f7efa..d97a24fbf82 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -1222,7 +1222,7 @@ intel_resolve_for_dri2_flush(struct brw_context *brw, if (rb->mt->surf.samples == 1) { assert(rb->mt_layer == 0 && rb->mt_level == 0 && rb->layer_count == 1); - intel_miptree_prepare_access(brw, rb->mt, 0, 1, 0, 1, false, false); + intel_miptree_prepare_external(brw, rb->mt); } else { intel_renderbuffer_downsample(brw, rb); } diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 06ecc8a6de0..237ab182712 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -25,6 +25,7 @@ #include <GL/gl.h> #include <GL/internal/dri_interface.h> +#include <drm_fourcc.h> #include "intel_batchbuffer.h" #include "intel_image.h" @@ -596,6 +597,7 @@ make_surface(struct brw_context *brw, GLenum target, mesa_format format, mt->aux_state = NULL; mt->cpp = isl_format_get_layout(mt->surf.format)->bpb / 8; mt->compressed = _mesa_is_format_compressed(format); + mt->drm_modifier = DRM_FORMAT_MOD_INVALID; return mt; @@ -876,6 +878,8 @@ miptree_create_for_planar_image(struct brw_context *brw, planar_mt->plane[i - 1] = mt; } + planar_mt->drm_modifier = image->modifier; + return planar_mt; } @@ -1014,6 +1018,7 @@ intel_miptree_create_for_dri_image(struct brw_context *brw, mt->target = target; mt->level[0].level_x = image->tile_x; mt->level[0].level_y = image->tile_y; + mt->drm_modifier = image->modifier; /* From "OES_EGL_image" error reporting. We report GL_INVALID_OPERATION * for EGL images from non-tile aligned sufaces in gen4 hw and earlier which has @@ -2740,6 +2745,37 @@ intel_miptree_finish_depth(struct brw_context *brw, } } +void +intel_miptree_prepare_external(struct brw_context *brw, + struct intel_mipmap_tree *mt) +{ + enum isl_aux_usage aux_usage = ISL_AUX_USAGE_NONE; + bool supports_fast_clear = false; + + const struct isl_drm_modifier_info *mod_info = + isl_drm_modifier_get_info(mt->drm_modifier); + + if (mod_info && mod_info->aux_usage != ISL_AUX_USAGE_NONE) { + /* CCS_E is the only supported aux for external images and it's only + * supported on very simple images. + */ + assert(mod_info->aux_usage == ISL_AUX_USAGE_CCS_E); + assert(_mesa_is_format_color_format(mt->format)); + assert(mt->first_level == 0 && mt->last_level == 0); + assert(mt->surf.logical_level0_px.depth == 1); + assert(mt->surf.logical_level0_px.array_len == 1); + assert(mt->surf.samples == 1); + assert(mt->mcs_buf != NULL); + + aux_usage = mod_info->aux_usage; + supports_fast_clear = mod_info->supports_clear_color; + } + + intel_miptree_prepare_access(brw, mt, 0, INTEL_REMAINING_LEVELS, + 0, INTEL_REMAINING_LAYERS, + aux_usage, supports_fast_clear); +} + /** * Make it possible to share the BO backing the given miptree with another * process or another miptree. diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h index d9d693dd3c5..e2b23c5aadd 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h @@ -339,6 +339,13 @@ struct intel_mipmap_tree */ union isl_color_value fast_clear_color; + /** + * For external surfaces, this is DRM format modifier that was used to + * create or import the surface. For internal surfaces, this will always + * be DRM_FORMAT_MOD_INVALID. + */ + uint64_t drm_modifier; + /* These are also refcounted: */ GLuint refcount; @@ -663,6 +670,9 @@ intel_miptree_finish_depth(struct brw_context *brw, struct intel_mipmap_tree *mt, uint32_t level, uint32_t start_layer, uint32_t layer_count, bool depth_written); +void +intel_miptree_prepare_external(struct brw_context *brw, + struct intel_mipmap_tree *mt); void intel_miptree_make_shareable(struct brw_context *brw, |