diff options
| author | Vladimir Dergachev <[email protected]> | 2005-02-03 04:16:59 +0000 |
|---|---|---|
| committer | Vladimir Dergachev <[email protected]> | 2005-02-03 04:16:59 +0000 |
| commit | 3f0926b612ca2aaf7a38c2b0ac9a48baa0d7502d (patch) | |
| tree | 44e74ff2e5f5b847d434a7e3fa7e98e1a3e3f519 | |
| parent | cb085044c9e09742187bb5a1060473bbf03f1e13 (diff) | |
Remove redundant instructions from fixed pipelines, looks like they do not do anything, at least on my hardware.
| -rw-r--r-- | src/mesa/drivers/dri/r300/pixel_shader.h | 9 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/r300/r300_fixed_pipelines.h | 39 |
2 files changed, 13 insertions, 35 deletions
diff --git a/src/mesa/drivers/dri/r300/pixel_shader.h b/src/mesa/drivers/dri/r300/pixel_shader.h index 07c84497340..0d04859f9b8 100644 --- a/src/mesa/drivers/dri/r300/pixel_shader.h +++ b/src/mesa/drivers/dri/r300/pixel_shader.h @@ -91,4 +91,13 @@ #define EASY_PFS_INSTR3(dstc, src0, src1, src2, flag) \ MAKE_PFS_INSTR3(dstc, src0, src1, src2, PFS_FLAG_##flag) + /* What are 0's ORed with flags ? They are register numbers that + just happen to be 0 */ +#define PFS_NOP { \ + EASY_PFS_INSTR0(MAD, SRC0C_XYZ, ONE, ZERO), \ + EASY_PFS_INSTR1(0, 0, 0 | PFS_FLAG_CONST, 0 | PFS_FLAG_CONST, NONE, ALL), \ + EASY_PFS_INSTR2(MAD, SRC0A, ONE, ZERO), \ + EASY_PFS_INSTR3(0, 0, 0 | PFS_FLAG_CONST, 0 | PFS_FLAG_CONST, OUTPUT) \ + } + #endif diff --git a/src/mesa/drivers/dri/r300/r300_fixed_pipelines.h b/src/mesa/drivers/dri/r300/r300_fixed_pipelines.h index 55d7bd9e8c9..0b74ed82e23 100644 --- a/src/mesa/drivers/dri/r300/r300_fixed_pipelines.h +++ b/src/mesa/drivers/dri/r300/r300_fixed_pipelines.h @@ -98,25 +98,7 @@ static struct r300_pixel_shader_state FLAT_COLOR_PIXEL_SHADER={ length: 0 }, alu: { - length: 2, - inst: { - /* What are 0's ORed with flags ? They are register numbers that - just happen to be 0 */ - { - EASY_PFS_INSTR0(MAD, SRC0C_XYZ, ONE, ZERO), - EASY_PFS_INSTR1(0, 0, 0 | PFS_FLAG_CONST, 0 | PFS_FLAG_CONST, NONE, ALL), - EASY_PFS_INSTR2(MAD, SRC0A, ONE, ZERO), - EASY_PFS_INSTR3(0, 0, 0 | PFS_FLAG_CONST, 0 | PFS_FLAG_CONST, OUTPUT) - }, - - { - EASY_PFS_INSTR0(MAD, SRC0C_XYZ, ONE, ZERO), - EASY_PFS_INSTR1(0, 0, 0 | PFS_FLAG_CONST, 0 | PFS_FLAG_CONST, NONE, ALL), - EASY_PFS_INSTR2(MAD, SRC0A, ONE, ZERO), - EASY_PFS_INSTR3(0, 0, 0 | PFS_FLAG_CONST, 0 | PFS_FLAG_CONST, OUTPUT) - } - - } + length: 0, }, node: { { 0, 0, 0, 0}, @@ -247,18 +229,12 @@ static struct r300_pixel_shader_state SINGLE_TEXTURE_PIXEL_SHADER={ inst: { 0x00018000 } }, alu: { - length: 3, - inst: { + length: 1, + inst: + { /* What are 0's ORed with flags ? They are register numbers that just happen to be 0 */ { - EASY_PFS_INSTR0(MAD, SRC0C_XYZ, ONE, ZERO), - EASY_PFS_INSTR1(0, 0, 0 | PFS_FLAG_CONST, 0 | PFS_FLAG_CONST, NONE, ALL), - EASY_PFS_INSTR2(MAD, SRC0A, ONE, ZERO), - EASY_PFS_INSTR3(0, 0, 0 | PFS_FLAG_CONST, 0 | PFS_FLAG_CONST, OUTPUT) - }, - - { EASY_PFS_INSTR0(MAD, SRC0C_XYZ, SRC1C_XYZ, ZERO), EASY_PFS_INSTR1(0, 0, 1, 0 | PFS_FLAG_CONST, NONE, ALL), @@ -271,13 +247,6 @@ static struct r300_pixel_shader_state SINGLE_TEXTURE_PIXEL_SHADER={ /* alpha in textures */ EASY_PFS_INSTR2(MAD, SRC0A, SRC1A, ZERO), EASY_PFS_INSTR3(0, 0, 1, 0 | PFS_FLAG_CONST, OUTPUT) - }, - - { - EASY_PFS_INSTR0(MAD, SRC0C_XYZ, ONE, ZERO), - EASY_PFS_INSTR1(0, 0, 0 | PFS_FLAG_CONST, 0 | PFS_FLAG_CONST, NONE, ALL), - EASY_PFS_INSTR2(MAD, SRC0A, ONE, ZERO), - EASY_PFS_INSTR3(0, 0, 0 | PFS_FLAG_CONST, 0 | PFS_FLAG_CONST, OUTPUT) } } }, |