nvc0/ir: fix up mul+add -> mad algebraic opt, enable for integers

For some reason this has been disabled for integers ever since codegen
was merged, despite there being emission code for IMAD. Seems to work.

Signed-off-by: Ilia Mirkin <[email protected]>

3 files changed, 11 insertions, 12 deletions

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 9f446280af8..2f21257d88a 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -957,7 +957,8 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
          if (i->op != OP_CVT)
             i->src(0).mod = 0;
       } else
-      if (imm0.isInteger(1) || imm0.isInteger(-1)) {
+      if (i->subOp != NV50_IR_SUBOP_MUL_HIGH &&
+          (imm0.isInteger(1) || imm0.isInteger(-1))) {
          if (imm0.isNegative())
             i->src(t).mod = i->src(t).mod ^ Modifier(NV50_IR_MOD_NEG);
          if (s == 0) {
@@ -1589,12 +1590,11 @@ AlgebraicOpt::tryADDToMADOrSAD(Instruction *add, operation toOp)
    else
       return false;
 
-   if ((src0->getUniqueInsn() && src0->getUniqueInsn()->bb != add->bb) ||
-       (src1->getUniqueInsn() && src1->getUniqueInsn()->bb != add->bb))
-      return false;
-
    src = add->getSrc(s);
 
+   if (src->getUniqueInsn() && src->getUniqueInsn()->bb != add->bb)
+      return false;
+
    if (src->getInsn()->postFactor)
       return false;
    if (toOp == OP_SAD) {
@@ -1605,6 +1605,10 @@ AlgebraicOpt::tryADDToMADOrSAD(Instruction *add, operation toOp)
          return false;
    }
 
+   if (typeSizeof(add->dType) != typeSizeof(src->getInsn()->dType) ||
+       isFloatType(add->dType) != isFloatType(src->getInsn()->dType))
+      return false;
+
    mod[0] = add->src(0).mod;
    mod[1] = add->src(1).mod;
    mod[2] = src->getUniqueInsn()->src(0).mod;
@@ -1615,6 +1619,8 @@ AlgebraicOpt::tryADDToMADOrSAD(Instruction *add, operation toOp)
 
    add->op = toOp;
    add->subOp = src->getInsn()->subOp; // potentially mul-high
+   add->dType = src->getInsn()->dType; // sign matters for imad hi
+   add->sType = src->getInsn()->sType;
 
    add->setSrc(2, add->src(s ? 0 : 1));
 
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_gm107.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_gm107.cpp
index 202d7443588..92caeb22c12 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_gm107.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_gm107.cpp
@@ -55,11 +55,6 @@ bool
 TargetGM107::isOpSupported(operation op, DataType ty) const
 {
    switch (op) {
-   case OP_MAD:
-   case OP_FMA:
-      if (ty != TYPE_F32)
-         return false;
-      break;
    case OP_SAD:
    case OP_POW:
    case OP_SQRT:
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
index 0f1f4f8d857..19637ce33f5 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
@@ -395,8 +395,6 @@ TargetNVC0::isAccessSupported(DataFile file, DataType ty) const
 bool
 TargetNVC0::isOpSupported(operation op, DataType ty) const
 {
-   if ((op == OP_MAD || op == OP_FMA) && (ty != TYPE_F32))
-      return false;
    if (op == OP_SAD && ty != TYPE_S32 && ty != TYPE_U32)
       return false;
    if (op == OP_POW || op == OP_SQRT || op == OP_DIV || op == OP_MOD)