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authorTom Stellard <thomas.stellard@amd.com>2012-05-17 20:39:54 -0400
committerTom Stellard <thomas.stellard@amd.com>2012-05-17 20:42:16 -0400
commitc20e7417992380871261699c2b0123819e7d51fc (patch)
treeeee9412d70164903355bdd94eb3cf1aa4fb5511a
parent7e3cd8df183448e2cc01a8f2645a001b0972f4ab (diff)
radeon/llvm: Fix segfault while lowering lrp intrinsic
-rw-r--r--src/gallium/drivers/radeon/AMDGPUISelLowering.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp b/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp
index b447e67bd8a..8df80352085 100644
--- a/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp
+++ b/src/gallium/drivers/radeon/AMDGPUISelLowering.cpp
@@ -91,8 +91,9 @@ SDValue AMDGPUTargetLowering::LowerIntrinsicLRP(SDValue Op,
{
DebugLoc DL = Op.getDebugLoc();
EVT VT = Op.getValueType();
- SDValue OneSubA = DAG.getNode(ISD::FSUB, DL, VT, DAG.getConstant(1, VT),
- Op.getOperand(1));
+ SDValue OneSubA = DAG.getNode(ISD::FSUB, DL, VT,
+ DAG.getConstantFP(1.0f, MVT::f32),
+ Op.getOperand(1));
SDValue OneSubAC = DAG.getNode(ISD::FMUL, DL, VT, OneSubA,
Op.getOperand(3));
return DAG.getNode(AMDILISD::MAD, DL, VT, Op.getOperand(1),