diff options
author | Eric Anholt <[email protected]> | 2011-09-06 10:21:54 -0700 |
---|---|---|
committer | Eric Anholt <[email protected]> | 2011-10-03 13:29:38 -0700 |
commit | 669f1822d2a60865514faf37f9fde21e4567b3d2 (patch) | |
tree | 2ff3c3c60d4097418d153d200c56d90ceb05f597 | |
parent | 82691574b6fc5a66290cbab88010caa8bc00c1dd (diff) |
i965: Add support for GL_EXT_texture_array and GL_MESA_texture_array.
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.c | 5 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_tex_layout.c | 5 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_emit.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_pass1.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_extensions.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 13 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_tex_layout.c | 3 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_tex_validate.c | 14 |
9 files changed, 43 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 9aabb7a1d70..dc91852753f 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -100,6 +100,11 @@ GLboolean brwCreateContext( int api, ctx->Const.MaxTextureLevels = MAX_TEXTURE_LEVELS; ctx->Const.Max3DTextureLevels = 9; ctx->Const.MaxCubeTextureLevels = 12; + /* minimum maximum. Users are likely to run into memory problems + * even at this size, since 64 * 2048 * 2048 * 4 = 1GB and we can't + * address that much. + */ + ctx->Const.MaxArrayTextureLayers = 64; ctx->Const.MaxTextureRectSize = (1<<12); ctx->Const.MaxTextureMaxAnisotropy = 16.0; diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c index e030ffcd21f..d77bf4d7cd9 100644 --- a/src/mesa/drivers/dri/i965/brw_tex_layout.c +++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c @@ -168,6 +168,11 @@ brw_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree *mt) break; } + case GL_TEXTURE_2D_ARRAY: + case GL_TEXTURE_1D_ARRAY: + brw_miptree_layout_texture_array(intel, mt, mt->depth0); + break; + default: i945_miptree_layout_2d(mt, 1); break; diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c index 6ea4a7d6e50..c20b07997fe 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_emit.c +++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c @@ -1076,11 +1076,13 @@ void emit_tex(struct brw_wm_compile *c, nr_texcoords = 1; break; case TEXTURE_2D_INDEX: + case TEXTURE_1D_ARRAY_INDEX: case TEXTURE_RECT_INDEX: emit = WRITEMASK_XY; nr_texcoords = 2; break; case TEXTURE_3D_INDEX: + case TEXTURE_2D_ARRAY_INDEX: case TEXTURE_CUBE_INDEX: emit = WRITEMASK_XYZ; nr_texcoords = 3; diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass1.c b/src/mesa/drivers/dri/i965/brw_wm_pass1.c index 7d6a3fa9f12..ee7a627455f 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_pass1.c +++ b/src/mesa/drivers/dri/i965/brw_wm_pass1.c @@ -93,8 +93,10 @@ static GLuint get_texcoord_mask( GLuint tex_idx ) case TEXTURE_1D_INDEX: return WRITEMASK_X; case TEXTURE_2D_INDEX: + case TEXTURE_1D_ARRAY_INDEX: return WRITEMASK_XY; case TEXTURE_3D_INDEX: + case TEXTURE_2D_ARRAY_INDEX: return WRITEMASK_XYZ; case TEXTURE_CUBE_INDEX: return WRITEMASK_XYZ; diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 452ee4e7926..d6cea7d19e9 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -50,12 +50,14 @@ translate_tex_target(GLenum target) { switch (target) { case GL_TEXTURE_1D: + case GL_TEXTURE_1D_ARRAY_EXT: return BRW_SURFACE_1D; case GL_TEXTURE_RECTANGLE_NV: return BRW_SURFACE_2D; case GL_TEXTURE_2D: + case GL_TEXTURE_2D_ARRAY_EXT: return BRW_SURFACE_2D; case GL_TEXTURE_3D: diff --git a/src/mesa/drivers/dri/intel/intel_extensions.c b/src/mesa/drivers/dri/intel/intel_extensions.c index c69c285b176..7a5ef3e5f05 100644 --- a/src/mesa/drivers/dri/intel/intel_extensions.c +++ b/src/mesa/drivers/dri/intel/intel_extensions.c @@ -116,12 +116,14 @@ intelInitExtensions(struct gl_context *ctx) ctx->Extensions.ARB_texture_rg = true; ctx->Extensions.EXT_draw_buffers2 = true; ctx->Extensions.EXT_framebuffer_sRGB = true; + ctx->Extensions.EXT_texture_array = true; ctx->Extensions.EXT_texture_snorm = true; ctx->Extensions.EXT_texture_sRGB = true; ctx->Extensions.EXT_texture_sRGB_decode = true; ctx->Extensions.EXT_texture_swizzle = true; ctx->Extensions.EXT_vertex_array_bgra = true; ctx->Extensions.ATI_envmap_bumpmap = true; + ctx->Extensions.MESA_texture_array = true; ctx->Extensions.NV_conditional_render = true; } diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c index 683dfb9a045..dbdc5efeae9 100644 --- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c @@ -319,15 +319,22 @@ intel_miptree_get_image_offset(struct intel_mipmap_tree *mt, GLuint level, GLuint face, GLuint depth, GLuint *x, GLuint *y) { - if (mt->target == GL_TEXTURE_CUBE_MAP_ARB) { + switch (mt->target) { + case GL_TEXTURE_CUBE_MAP_ARB: *x = mt->level[level].x_offset[face]; *y = mt->level[level].y_offset[face]; - } else if (mt->target == GL_TEXTURE_3D) { + break; + case GL_TEXTURE_3D: + case GL_TEXTURE_2D_ARRAY_EXT: + case GL_TEXTURE_1D_ARRAY_EXT: + assert(depth < mt->level[level].nr_images); *x = mt->level[level].x_offset[depth]; *y = mt->level[level].y_offset[depth]; - } else { + break; + default: *x = mt->level[level].x_offset[0]; *y = mt->level[level].y_offset[0]; + break; } } diff --git a/src/mesa/drivers/dri/intel/intel_tex_layout.c b/src/mesa/drivers/dri/intel/intel_tex_layout.c index e796aaf0045..64f4a70c52c 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_layout.c +++ b/src/mesa/drivers/dri/intel/intel_tex_layout.c @@ -58,6 +58,7 @@ void i945_miptree_layout_2d(struct intel_mipmap_tree *mt, int nr_images) GLuint y = 0; GLuint width = mt->width0; GLuint height = mt->height0; + GLuint depth = mt->depth0; /* number of array layers. */ mt->total_width = mt->width0; intel_get_texture_alignment_unit(mt->format, &align_w, &align_h); @@ -93,7 +94,7 @@ void i945_miptree_layout_2d(struct intel_mipmap_tree *mt, int nr_images) GLuint img_height; intel_miptree_set_level_info(mt, level, nr_images, x, y, width, - height, 1); + height, depth); img_height = ALIGN(height, align_h); if (mt->compressed) diff --git a/src/mesa/drivers/dri/intel/intel_tex_validate.c b/src/mesa/drivers/dri/intel/intel_tex_validate.c index c06279ce25e..50dc8c0b58d 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_validate.c +++ b/src/mesa/drivers/dri/intel/intel_tex_validate.c @@ -138,9 +138,21 @@ intel_tex_map_image_for_swrast(struct intel_context *intel, mt = intel_image->mt; - if (mt->target == GL_TEXTURE_3D) { + if (mt->target == GL_TEXTURE_3D || + mt->target == GL_TEXTURE_2D_ARRAY || + mt->target == GL_TEXTURE_1D_ARRAY) { int i; + if (mt->target == GL_TEXTURE_2D_ARRAY || + mt->target == GL_TEXTURE_1D_ARRAY) { + /* Mesa only allocates one entry for these, but we really do have an + * offset per depth. + */ + free(intel_image->base.Base.ImageOffsets); + intel_image->base.Base.ImageOffsets = malloc(mt->level[level].depth * + sizeof(GLuint)); + } + /* ImageOffsets[] is only used for swrast's fetch_texel_3d, so we can't * share code with the normal path. */ |