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authorDave Airlie <[email protected]>2010-01-11 13:21:47 +1000
committerDave Airlie <airlied@itt42.(none)>2010-01-11 13:24:59 +1000
commit42f2880ffd0b847df7cb56b7f7f0747287e0b08f (patch)
treec3a2c91c81196dbba1e8337d52dcb72bc644c74e
parent554043bff72ced41b2a5e03e61cbc087bb41bd3d (diff)
radeon: fix prediction for r100 inline vert/elt emits.
On r100 we emit the indices inline so we need to account for that in the emission size.
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_tcl.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_tcl.c b/src/mesa/drivers/dri/radeon/radeon_tcl.c
index b334ea05e5b..cd02bfbcf5d 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tcl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tcl.c
@@ -412,6 +412,7 @@ static GLuint radeonEnsureEmitSize( GLcontext * ctx , GLuint inputs )
space_required += vbuf;
else
space_required += index + elts;
+ space_required += VB->Primitive[i].count * 3;
space_required += AOS_BUFSZ(nr_aos);
}
space_required += SCISSOR_BUFSZ;