diff options
author | Eric Anholt <[email protected]> | 2012-07-09 15:52:53 -0700 |
---|---|---|
committer | Eric Anholt <[email protected]> | 2012-08-07 11:47:49 -0700 |
commit | 2ea3ab14f2182978f471674c9dfce029d37f70a7 (patch) | |
tree | 43b8cc92126bea4c705e942c06390a060eaf5631 | |
parent | 71ba6de342b88dcf8ed3aa347da157b7724230e7 (diff) |
glsl: Add a "ubo_load" expression type for fetches from UBOs.
Drivers will probably want to be able to take UBO references in a
shader like:
uniform ubo1 {
float a;
float b;
float c;
float d;
}
void main() {
gl_FragColor = vec4(a, b, c, d);
}
and generate a single aligned vec4 load out of the UBO. For intel,
this involves recognizing the shared offset of the aligned loads and
CSEing them out. Obviously that involves breaking things down to
loads from an offset from a particular UBO first. Thus, the driver
doesn't want to see
variable_ref(ir_variable("a")),
and even more so does it not want to see
array_ref(record_ref(variable_ref(ir_variable("a")),
"field1"), variable_ref(ir_variable("i"))).
where a.field1[i] is a row_major matrix.
Instead, we're going to make a lowering pass to break UBO references
down to expressions that are obvious to codegen, and amenable to
merging through CSE.
v2: Fix some partial thoughts in the ir_binop comment (review by Kenneth)
Reviewed-by: Ian Romanick <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
-rw-r--r-- | src/glsl/ir.cpp | 1 | ||||
-rw-r--r-- | src/glsl/ir.h | 10 | ||||
-rw-r--r-- | src/glsl/ir_validate.cpp | 7 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp | 5 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 4 | ||||
-rw-r--r-- | src/mesa/program/ir_to_mesa.cpp | 4 | ||||
-rw-r--r-- | src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 4 |
8 files changed, 38 insertions, 1 deletions
diff --git a/src/glsl/ir.cpp b/src/glsl/ir.cpp index b0e38d820e6..f59cdd29ab8 100644 --- a/src/glsl/ir.cpp +++ b/src/glsl/ir.cpp @@ -480,6 +480,7 @@ static const char *const operator_strs[] = { "min", "max", "pow", + "ubo_load", "vector", }; diff --git a/src/glsl/ir.h b/src/glsl/ir.h index f019837d5f7..89c516c877d 100644 --- a/src/glsl/ir.h +++ b/src/glsl/ir.h @@ -1018,9 +1018,17 @@ enum ir_expression_operation { ir_binop_pow, /** + * Load a value the size of a given GLSL type from a uniform block. + * + * operand0 is the ir_constant uniform block index in the linked shader. + * operand1 is a byte offset within the uniform block. + */ + ir_binop_ubo_load, + + /** * A sentinel marking the last of the binary operations. */ - ir_last_binop = ir_binop_pow, + ir_last_binop = ir_binop_ubo_load, ir_quadop_vector, diff --git a/src/glsl/ir_validate.cpp b/src/glsl/ir_validate.cpp index 191d3983109..af0b5768ac0 100644 --- a/src/glsl/ir_validate.cpp +++ b/src/glsl/ir_validate.cpp @@ -423,6 +423,13 @@ ir_validate::visit_leave(ir_expression *ir) assert(ir->operands[0]->type == ir->operands[1]->type); break; + case ir_binop_ubo_load: + assert(ir->operands[0]->as_constant()); + assert(ir->operands[0]->type == glsl_type::uint_type); + + assert(ir->operands[1]->type == glsl_type::uint_type); + break; + case ir_quadop_vector: /* The vector operator collects some number of scalars and generates a * vector from them. diff --git a/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp b/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp index 983d92e971d..58521ee6e6d 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp @@ -337,6 +337,11 @@ ir_channel_expressions_visitor::visit_leave(ir_assignment *ir) case ir_unop_noise: assert(!"noise should have been broken down to function call"); break; + + case ir_binop_ubo_load: + assert(!"not yet supported"); + break; + case ir_quadop_vector: assert(!"should have been lowered"); break; diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp index f5090fae3c1..1e18e92de54 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp @@ -571,6 +571,10 @@ fs_visitor::visit(ir_expression *ir) else inst = emit(BRW_OPCODE_SHR, this->result, op[0], op[1]); break; + + case ir_binop_ubo_load: + assert(!"not yet supported"); + break; } } diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index 9ae99b4b3ac..8a4a1b0721e 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp @@ -1314,6 +1314,10 @@ vec4_visitor::visit(ir_expression *ir) inst = emit(BRW_OPCODE_SHR, result_dst, op[0], op[1]); break; + case ir_binop_ubo_load: + assert(!"not yet supported"); + break; + case ir_quadop_vector: assert(!"not reached: should be handled by lower_quadop_vector"); break; diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp index 255a8a76a0f..70c4cc8aec1 100644 --- a/src/mesa/program/ir_to_mesa.cpp +++ b/src/mesa/program/ir_to_mesa.cpp @@ -1456,6 +1456,10 @@ ir_to_mesa_visitor::visit(ir_expression *ir) emit(ir, OPCODE_MOV, result_dst, op[0]); break; + case ir_binop_ubo_load: + assert(!"not supported"); + break; + case ir_quadop_vector: /* This operation should have already been handled. */ diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp index 66627acb6fc..43c80be13e2 100644 --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp @@ -1867,6 +1867,10 @@ glsl_to_tgsi_visitor::visit(ir_expression *ir) assert(!"GLSL 1.30 features unsupported"); break; + case ir_binop_ubo_load: + assert(!"not yet supported"); + break; + case ir_quadop_vector: /* This operation should have already been handled. */ |