diff options
| author | Ilia Mirkin <[email protected]> | 2019-02-04 23:33:09 -0500 |
|---|---|---|
| committer | Ilia Mirkin <[email protected]> | 2019-02-04 23:36:46 -0500 |
| commit | 38f542783faa360020b77fdd76b97f207a9e0068 (patch) | |
| tree | a8b3171c35ac93c5ed9375e9dd56dbc38715b551 | |
| parent | e67e0726372ab65f410411e607701be4673ff6ef (diff) | |
nv50,nvc0: add explicit settings for recent caps
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: 19.0 <[email protected]>
| -rw-r--r-- | src/gallium/drivers/nouveau/nv50/nv50_screen.c | 2 | ||||
| -rw-r--r-- | src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c b/src/gallium/drivers/nouveau/nv50/nv50_screen.c index 0c53b22eb3c..85cb016e3c2 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c @@ -215,6 +215,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_TGSI_CLOCK: case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX: case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION: + case PIPE_CAP_DEST_SURFACE_SRGB_CONTROL: return 1; case PIPE_CAP_SEAMLESS_CUBE_MAP: return 1; /* class_3d >= NVA0_3D_CLASS; */ @@ -312,6 +313,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_TGSI_ATOMFADD: case PIPE_CAP_QUERY_PIPELINE_STATISTICS_SINGLE: case PIPE_CAP_RGB_OVERRIDE_DST_ALPHA_BLEND: + case PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTS: return 0; case PIPE_CAP_VENDOR_ID: diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c index 68b5869276a..216fba49d9e 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c @@ -266,6 +266,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX: case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION: case PIPE_CAP_QUERY_SO_OVERFLOW: + case PIPE_CAP_DEST_SURFACE_SRGB_CONTROL: return 1; case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER: return nouveau_screen(pscreen)->vram_domain & NOUVEAU_BO_VRAM ? 1 : 0; @@ -336,6 +337,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_SURFACE_SAMPLE_COUNT: case PIPE_CAP_QUERY_PIPELINE_STATISTICS_SINGLE: case PIPE_CAP_RGB_OVERRIDE_DST_ALPHA_BLEND: + case PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTS: return 0; case PIPE_CAP_VENDOR_ID: |