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authorJordan Justen <[email protected]>2014-06-29 12:06:33 -0700
committerJordan Justen <[email protected]>2015-03-09 23:56:51 -0700
commit31b851dccb606090989c0400fc1899cbfe44bcf1 (patch)
tree110d7238bcfdee03d4cad43467c1b0d76a513e32
parent26eabd189d9dd1e1e1c711ee4bcc8ff73c076d11 (diff)
i965/gen8: Don't rely directly on the hiz miptree structure
We are still allocating a miptree for hiz, but we only use fields from intel_miptree_aux_buffer. This will allow us to switch over to not allocating a miptree. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
-rw-r--r--src/mesa/drivers/dri/i965/gen8_depth_state.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c b/src/mesa/drivers/dri/i965/gen8_depth_state.c
index 9af9898cad3..c6494c9ecaa 100644
--- a/src/mesa/drivers/dri/i965/gen8_depth_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c
@@ -92,10 +92,10 @@ emit_depth_packets(struct brw_context *brw,
} else {
BEGIN_BATCH(5);
OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER << 16 | (5 - 2));
- OUT_BATCH((depth_mt->hiz_buf->mt->pitch - 1) | mocs_wb << 25);
- OUT_RELOC64(depth_mt->hiz_buf->mt->bo,
+ OUT_BATCH((depth_mt->hiz_buf->pitch - 1) | mocs_wb << 25);
+ OUT_RELOC64(depth_mt->hiz_buf->bo,
I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
- OUT_BATCH(depth_mt->hiz_buf->mt->qpitch >> 2);
+ OUT_BATCH(depth_mt->hiz_buf->qpitch >> 2);
ADVANCE_BATCH();
}