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authorIago Toral Quiroga <[email protected]>2016-06-28 11:54:07 +0200
committerSamuel Iglesias Gonsálvez <[email protected]>2017-01-03 11:26:51 +0100
commit07bc6a35d3d6d94d45b81bd10002f0e420d855c2 (patch)
tree5e11e678cd2c97de3090db27f1b634fc625ae0e5
parent2a857104e41167cef3c6a5132a45c88056c75dff (diff)
i965/vec4: do not split scratch read/write opcodes
64-bit scratch read/writes require to shuffle data around so we need to have access to the full 64-bit data. We will do the right thing for these when we emit the messages. Reviewed-by: Matt Turner <[email protected]>
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4.cpp9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index f198fad8514..29bf7863d69 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -2035,6 +2035,15 @@ static unsigned
get_lowered_simd_width(const struct gen_device_info *devinfo,
const vec4_instruction *inst)
{
+ /* Do not split some instructions that require special handling */
+ switch (inst->opcode) {
+ case SHADER_OPCODE_GEN4_SCRATCH_READ:
+ case SHADER_OPCODE_GEN4_SCRATCH_WRITE:
+ return inst->exec_size;
+ default:
+ break;
+ }
+
unsigned lowered_width = MIN2(16, inst->exec_size);
/* We need to split some cases of double-precision instructions that write