summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorChristoph Bumiller <[email protected]>2011-03-13 13:05:14 +0100
committerChristoph Bumiller <[email protected]>2011-03-13 13:23:54 +0100
commitf0ee7d8bb46ac7694693f3fb8cd0f15c422f1bef (patch)
tree2542af2077e4ee01a3638605e98bb3e027ef2e45
parentd9f1310e519ac8182329fcd3e6c357d44d110955 (diff)
nvc0: don't enable early-z if alpha test is enabled
Depth values are also written before the shader is executed, so if early tests are enabled, fragments that failed the alpha test were modifying the depth buffer, but they shouldn't.
-rw-r--r--src/gallium/drivers/nvc0/nvc0_context.h1
-rw-r--r--src/gallium/drivers/nvc0/nvc0_shader_state.c2
-rw-r--r--src/gallium/drivers/nvc0/nvc0_state.c14
-rw-r--r--src/gallium/drivers/nvc0/nvc0_state_validate.c15
4 files changed, 20 insertions, 12 deletions
diff --git a/src/gallium/drivers/nvc0/nvc0_context.h b/src/gallium/drivers/nvc0/nvc0_context.h
index 67c5a1287b1..aac358e142b 100644
--- a/src/gallium/drivers/nvc0/nvc0_context.h
+++ b/src/gallium/drivers/nvc0/nvc0_context.h
@@ -79,6 +79,7 @@ struct nvc0_context {
uint32_t instance_base;
int32_t index_bias;
boolean prim_restart;
+ boolean early_z;
uint8_t num_vtxbufs;
uint8_t num_vtxelts;
uint8_t num_textures[5];
diff --git a/src/gallium/drivers/nvc0/nvc0_shader_state.c b/src/gallium/drivers/nvc0/nvc0_shader_state.c
index 79b5f3d81cc..7294eaa222e 100644
--- a/src/gallium/drivers/nvc0/nvc0_shader_state.c
+++ b/src/gallium/drivers/nvc0/nvc0_shader_state.c
@@ -111,8 +111,6 @@ nvc0_fragprog_validate(struct nvc0_context *nvc0)
return;
nvc0_program_update_context_state(nvc0, fp, 4);
- BEGIN_RING(chan, RING_3D(EARLY_FRAGMENT_TESTS), 1);
- OUT_RING (chan, fp->fp.early_z);
BEGIN_RING(chan, RING_3D(SP_SELECT(5)), 2);
OUT_RING (chan, 0x51);
OUT_RING (chan, fp->code_base);
diff --git a/src/gallium/drivers/nvc0/nvc0_state.c b/src/gallium/drivers/nvc0/nvc0_state.c
index bbcac3938f5..1815fe88a9b 100644
--- a/src/gallium/drivers/nvc0/nvc0_state.c
+++ b/src/gallium/drivers/nvc0/nvc0_state.c
@@ -276,14 +276,11 @@ nvc0_zsa_state_create(struct pipe_context *pipe,
so->pipe = *cso;
- SB_IMMED_3D(so, DEPTH_WRITE_ENABLE, cso->depth.writemask);
- SB_BEGIN_3D(so, DEPTH_TEST_ENABLE, 1);
+ SB_IMMED_3D(so, DEPTH_TEST_ENABLE, cso->depth.enabled);
if (cso->depth.enabled) {
- SB_DATA (so, 1);
+ SB_IMMED_3D(so, DEPTH_WRITE_ENABLE, cso->depth.writemask);
SB_BEGIN_3D(so, DEPTH_TEST_FUNC, 1);
SB_DATA (so, nvgl_comparison_op(cso->depth.func));
- } else {
- SB_DATA (so, 0);
}
if (cso->stencil[0].enabled) {
@@ -315,15 +312,12 @@ nvc0_zsa_state_create(struct pipe_context *pipe,
if (cso->stencil[0].enabled) {
SB_IMMED_3D(so, STENCIL_TWO_SIDE_ENABLE, 0);
}
-
- SB_BEGIN_3D(so, ALPHA_TEST_ENABLE, 1);
+
+ SB_IMMED_3D(so, ALPHA_TEST_ENABLE, cso->alpha.enabled);
if (cso->alpha.enabled) {
- SB_DATA (so, 1);
SB_BEGIN_3D(so, ALPHA_TEST_REF, 2);
SB_DATA (so, fui(cso->alpha.ref_value));
SB_DATA (so, nvgl_comparison_op(cso->alpha.func));
- } else {
- SB_DATA (so, 0);
}
assert(so->size < (sizeof(so->state) / sizeof(so->state[0])));
diff --git a/src/gallium/drivers/nvc0/nvc0_state_validate.c b/src/gallium/drivers/nvc0/nvc0_state_validate.c
index c37a070bc68..4daa968de5a 100644
--- a/src/gallium/drivers/nvc0/nvc0_state_validate.c
+++ b/src/gallium/drivers/nvc0/nvc0_state_validate.c
@@ -387,6 +387,20 @@ nvc0_constbufs_validate(struct nvc0_context *nvc0)
}
}
+static void
+nvc0_validate_derived_1(struct nvc0_context *nvc0)
+{
+ struct nouveau_channel *chan = nvc0->screen->base.channel;
+ boolean early_z;
+
+ early_z = nvc0->fragprog->fp.early_z && !nvc0->zsa->pipe.alpha.enabled;
+
+ if (early_z != nvc0->state.early_z) {
+ nvc0->state.early_z = early_z;
+ IMMED_RING(chan, RING_3D(EARLY_FRAGMENT_TESTS), early_z);
+ }
+}
+
static struct state_validate {
void (*func)(struct nvc0_context *);
uint32_t states;
@@ -406,6 +420,7 @@ static struct state_validate {
{ nvc0_tevlprog_validate, NVC0_NEW_TEVLPROG },
{ nvc0_gmtyprog_validate, NVC0_NEW_GMTYPROG },
{ nvc0_fragprog_validate, NVC0_NEW_FRAGPROG },
+ { nvc0_validate_derived_1, NVC0_NEW_FRAGPROG | NVC0_NEW_ZSA },
{ nvc0_constbufs_validate, NVC0_NEW_CONSTBUF },
{ nvc0_validate_textures, NVC0_NEW_TEXTURES },
{ nvc0_validate_samplers, NVC0_NEW_SAMPLERS },