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authorLeo Liu <[email protected]>2014-04-03 16:53:30 -0400
committerChristian König <[email protected]>2014-04-04 12:35:55 +0200
commitde1a59b7a71583ae4fb09f9e4ee049895f14ca5f (patch)
tree875e977158e8e7bfcad52cd2234b7aa96b1f30e7
parent6c59be7776e4da17119a3fca21a0a568c5c11ea7 (diff)
radeon/vce: cleanup cpb handling
v2: fix whitespace errors, minor coding style changes Signed-off-by: Leo Liu <[email protected]> Signed-off-by: Christian König <[email protected]>
-rw-r--r--src/gallium/drivers/radeon/radeon_vce.c22
-rw-r--r--src/gallium/drivers/radeon/radeon_vce.h3
-rw-r--r--src/gallium/drivers/radeon/radeon_vce_40_2_2.c24
3 files changed, 38 insertions, 11 deletions
diff --git a/src/gallium/drivers/radeon/radeon_vce.c b/src/gallium/drivers/radeon/radeon_vce.c
index 0d3fe080867..4b824f9ef10 100644
--- a/src/gallium/drivers/radeon/radeon_vce.c
+++ b/src/gallium/drivers/radeon/radeon_vce.c
@@ -45,8 +45,6 @@
#include "radeon_video.h"
#include "radeon_vce.h"
-#define CPB_SIZE (40 * 1024 * 1024)
-
/**
* flush commands to the hardware
*/
@@ -213,6 +211,9 @@ struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context,
{
struct r600_common_screen *rscreen = (struct r600_common_screen *)context->screen;
struct rvce_encoder *enc;
+ struct pipe_video_buffer *tmp_buf, templat = {};
+ struct radeon_surface *tmp_surf;
+ unsigned pitch, vpitch;
if (!rscreen->info.vce_fw_version) {
RVID_ERR("Kernel doesn't supports VCE!\n");
@@ -246,8 +247,23 @@ struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context,
}
enc->ws->cs_set_flush_callback(enc->cs, rvce_cs_flush, enc);
+ templat.buffer_format = PIPE_FORMAT_NV12;
+ templat.chroma_format = PIPE_VIDEO_CHROMA_FORMAT_420;
+ templat.width = enc->base.width;
+ templat.height = enc->base.height;
+ templat.interlaced = false;
+ if (!(tmp_buf = context->create_video_buffer(context, &templat))) {
+ RVID_ERR("Can't create video buffer.\n");
+ goto error;
+ }
- if (!rvid_create_buffer(enc->ws, &enc->cpb, CPB_SIZE, RADEON_DOMAIN_VRAM)) {
+ get_buffer(((struct vl_video_buffer *)tmp_buf)->resources[0], NULL, &tmp_surf);
+ pitch = align(tmp_surf->level[0].pitch_bytes, 128);
+ vpitch = align(tmp_surf->npix_y, 16);
+ tmp_buf->destroy(tmp_buf);
+ if (!rvid_create_buffer(enc->ws, &enc->cpb,
+ pitch * vpitch * 1.5 * (RVCE_NUM_CPB_FRAMES + RVCE_NUM_CPB_EXTRA_FRAMES),
+ RADEON_DOMAIN_VRAM)) {
RVID_ERR("Can't create CPB buffer.\n");
goto error;
}
diff --git a/src/gallium/drivers/radeon/radeon_vce.h b/src/gallium/drivers/radeon/radeon_vce.h
index 80495e5e8d7..9dc0c68eefb 100644
--- a/src/gallium/drivers/radeon/radeon_vce.h
+++ b/src/gallium/drivers/radeon/radeon_vce.h
@@ -43,6 +43,9 @@
#define RVCE_READWRITE(buf, domain) RVCE_CS(RVCE_RELOC(buf, RADEON_USAGE_READWRITE, domain) * 4)
#define RVCE_END() *begin = (&enc->cs->buf[enc->cs->cdw] - begin) * 4; }
+#define RVCE_NUM_CPB_FRAMES 2
+#define RVCE_NUM_CPB_EXTRA_FRAMES 2
+
struct r600_common_screen;
/* driver dependent callback */
diff --git a/src/gallium/drivers/radeon/radeon_vce_40_2_2.c b/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
index b0961a9cc29..26c362961b8 100644
--- a/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
+++ b/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
@@ -218,14 +218,22 @@ static void rdo(struct rvce_encoder *enc)
RVCE_END();
}
-static void encode(struct rvce_encoder *enc)
+static void frame_offset(struct rvce_encoder *enc, unsigned frame_num,
+ unsigned *luma_offset, unsigned *chroma_offset)
{
- int i;
unsigned pitch = align(enc->luma->level[0].pitch_bytes, 128);
unsigned vpitch = align(enc->luma->npix_y, 16);
unsigned fsize = pitch * (vpitch + vpitch / 2);
- unsigned chroma_offset = pitch * vpitch;
- unsigned luma_offset;
+ unsigned base_offset = RVCE_NUM_CPB_EXTRA_FRAMES * fsize;
+
+ *luma_offset = base_offset + (frame_num % RVCE_NUM_CPB_FRAMES) * fsize;
+ *chroma_offset = *luma_offset + pitch * vpitch;
+}
+
+static void encode(struct rvce_encoder *enc)
+{
+ int i;
+ unsigned luma_offset, chroma_offset;
task_info(enc, 0x00000003);
@@ -282,7 +290,6 @@ static void encode(struct rvce_encoder *enc)
RVCE_CS(0x00000000); // pictureStructure
- luma_offset = (2 * ((enc->pic.frame_num - 1) % 2) * fsize + 2 * fsize);
if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR) {
RVCE_CS(0x00000000); // encPicType
RVCE_CS(0x00000000); // frameNumber
@@ -291,11 +298,12 @@ static void encode(struct rvce_encoder *enc)
RVCE_CS(0xffffffff); // chromaOffset
}
else if(enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P) {
+ frame_offset(enc, enc->pic.frame_num - 1, &luma_offset, &chroma_offset);
RVCE_CS(0x00000000); // encPicType
RVCE_CS(enc->pic.frame_num - 1); // frameNumber
RVCE_CS(enc->pic.frame_num - 1); // pictureOrderCount
RVCE_CS(luma_offset); // lumaOffset
- RVCE_CS(chroma_offset + luma_offset); // chromaOffset
+ RVCE_CS(chroma_offset); // chromaOffset
}
for (i = 0; i < 2; ++i) {
RVCE_CS(0x00000000); // pictureStructure
@@ -306,9 +314,9 @@ static void encode(struct rvce_encoder *enc)
RVCE_CS(0xffffffff); // chromaOffset
}
- luma_offset = (2 * (enc->pic.frame_num % 2) * fsize + 2 * fsize);
+ frame_offset(enc, enc->pic.frame_num, &luma_offset, &chroma_offset);
RVCE_CS(luma_offset); // encReconstructedLumaOffset
- RVCE_CS(chroma_offset + luma_offset); // encReconstructedChromaOffset
+ RVCE_CS(chroma_offset); // encReconstructedChromaOffset
RVCE_CS(0x00000000); // encColocBufferOffset
RVCE_CS(0x00000000); // encReconstructedRefBasePictureLumaOffset
RVCE_CS(0x00000000); // encReconstructedRefBasePictureChromaOffset