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authorKenneth Graunke <[email protected]>2013-01-04 07:53:09 -0800
committerKenneth Graunke <[email protected]>2013-01-07 16:48:02 -0800
commit899017fc54c40c969b5239b33f3a17b311878b0d (patch)
tree01d41b594b75aed0f688c93ae8cdae6e0c16d025
parent30f8f58c2035dc7a14cf44d0d9af87dfb9256e96 (diff)
i965: Use Haswell's sample_d_c for textureGrad with shadow samplers.
The new hardware actually just supports this now. Reviewed-by: Eric Anholt <[email protected]>
-rw-r--r--src/mesa/drivers/dri/i965/brw_defines.h1
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_emit.cpp9
-rw-r--r--src/mesa/drivers/dri/i965/brw_shader.cpp3
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_emit.cpp9
4 files changed, 17 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 1d0cf0275d1..41d60aa7d45 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -875,6 +875,7 @@ enum brw_message_target {
#define GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE 6
#define GEN5_SAMPLER_MESSAGE_SAMPLE_LD 7
#define GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO 10
+#define HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE 20
#define GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS 29
#define GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS 30
#define GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS 31
diff --git a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
index 305993401ea..324e6656d1f 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
@@ -387,8 +387,13 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src
msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO;
break;
case SHADER_OPCODE_TXD:
- /* There is no sample_d_c message; comparisons are done manually */
- msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS;
+ if (inst->shadow_compare) {
+ /* Gen7.5+. Otherwise, lowered by brw_lower_texture_gradients(). */
+ assert(intel->is_haswell);
+ msg_type = HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE;
+ } else {
+ msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS;
+ }
break;
case SHADER_OPCODE_TXF:
msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_LD;
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 1e8d57485ad..7539d542f2c 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -128,7 +128,8 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
lower_if_to_cond_assign(shader->ir, 16);
do_lower_texture_projection(shader->ir);
- brw_lower_texture_gradients(shader->ir);
+ if (intel->gen < 8 && !intel->is_haswell)
+ brw_lower_texture_gradients(shader->ir);
do_vec_index_to_cond_assign(shader->ir);
brw_do_cubemap_normalize(shader->ir);
lower_noise(shader->ir);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
index 9fa742d740c..747edc29a13 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
@@ -278,8 +278,13 @@ vec4_generator::generate_tex(vec4_instruction *inst,
}
break;
case SHADER_OPCODE_TXD:
- /* There is no sample_d_c message; comparisons are done manually. */
- msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS;
+ if (inst->shadow_compare) {
+ /* Gen7.5+. Otherwise, lowered by brw_lower_texture_gradients(). */
+ assert(intel->is_haswell);
+ msg_type = HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE;
+ } else {
+ msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS;
+ }
break;
case SHADER_OPCODE_TXF:
msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_LD;