diff options
| author | Rob Clark <[email protected]> | 2014-03-29 14:32:38 -0400 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2014-03-30 09:53:32 -0400 |
| commit | 83808a90bea75598a279ae45d96e55c562ad58e4 (patch) | |
| tree | c8621887f3d01f020fa0f4f56ca55bad84ab0995 | |
| parent | 2346ea6347bd59a92638d94c12ef731bbfcd720a (diff) | |
freedreno/a3xx/compiler: avoid negative register ids
In some cases, we need a register to be assigned up to three components
before the base. Since we can't have negative register #'s, just shift
everything up. May increase register usage for trivial shaders, but I
don't think we are shader limited in those cases. A proper solution is
going to require a better register assignment algorithm (which is on the
TODO list), this is just a hack to get us by until then.
Signed-off-by: Rob Clark <[email protected]>
| -rw-r--r-- | src/gallium/drivers/freedreno/a3xx/ir3_ra.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gallium/drivers/freedreno/a3xx/ir3_ra.c b/src/gallium/drivers/freedreno/a3xx/ir3_ra.c index d926483a222..4e48eded2bb 100644 --- a/src/gallium/drivers/freedreno/a3xx/ir3_ra.c +++ b/src/gallium/drivers/freedreno/a3xx/ir3_ra.c @@ -104,8 +104,8 @@ static int output_base(struct ir3_ra_ctx *ctx) */ if (ctx->type == SHADER_FRAGMENT) { if (ctx->half_precision) - return ctx->frag_face ? 1 : 0; - return ctx->frag_coord ? 6 : 2; + return ctx->frag_face ? 4 : 3; + return ctx->frag_coord ? 8 : 4; } return 0; } |