diff options
| author | Samuel Pitoiset <[email protected]> | 2019-10-31 09:30:47 +0100 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2019-11-06 09:20:30 +0100 |
| commit | f010b90ac5c8b3e8df3264086e472bd5df1cb9bc (patch) | |
| tree | e13a0bb9998fce79997728359ac905657a907f40 | |
| parent | c0f76528ae237c9c1ddc6e4356aa9e0a86942069 (diff) | |
radv/gfx10: enable wave32 for compute based on shader's wavesize
This will allow to change wavesize on-demand.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
| -rw-r--r-- | src/amd/vulkan/radv_cmd_buffer.c | 5 | ||||
| -rw-r--r-- | src/amd/vulkan/radv_device.c | 3 | ||||
| -rw-r--r-- | src/amd/vulkan/radv_pipeline.c | 2 |
3 files changed, 7 insertions, 3 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index a172767e3dd..87320e6d822 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -4850,6 +4850,11 @@ radv_emit_dispatch_packets(struct radv_cmd_buffer *cmd_buffer, ASSERTED unsigned cdw_max = radeon_check_space(ws, cs, 25); + if (compute_shader->info.wave_size == 32) { + assert(cmd_buffer->device->physical_device->rad_info.chip_class >= GFX10); + dispatch_initiator |= S_00B800_CS_W32_EN(1); + } + if (info->indirect) { uint64_t va = radv_buffer_get_va(info->indirect->bo); diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index e35c3e43d83..ec59bfb1ea9 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -2486,8 +2486,7 @@ VkResult radv_CreateDevice( device->scratch_waves = MAX2(32 * physical_device->rad_info.num_good_compute_units, max_threads_per_block / 64); - device->dispatch_initiator = S_00B800_COMPUTE_SHADER_EN(1) | - S_00B800_CS_W32_EN(device->physical_device->cs_wave_size == 32); + device->dispatch_initiator = S_00B800_COMPUTE_SHADER_EN(1); if (device->physical_device->rad_info.chip_class >= GFX7) { /* If the KMD allows it (there is a KMD hw register for it), diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index ee0a2438788..8932d9fa54d 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -5042,7 +5042,7 @@ radv_compute_generate_pm4(struct radv_pipeline *pipeline) compute_shader->info.cs.block_size[1] * compute_shader->info.cs.block_size[2]; waves_per_threadgroup = DIV_ROUND_UP(threads_per_threadgroup, - device->physical_device->cs_wave_size); + compute_shader->info.wave_size); if (device->physical_device->rad_info.chip_class >= GFX10 && waves_per_threadgroup == 1) |