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authorJosé Fonseca <[email protected]>2012-10-17 15:27:26 +0100
committerJosé Fonseca <[email protected]>2012-10-17 15:27:26 +0100
commitea2978b11c02ca52c1f0b144d604597b664f6118 (patch)
tree731f6018bccb5956f8a7ba3bcfd34ce9df9094c6
parent2ab6e67d9093db7d44eefd3c6fa599e4b9cdd73c (diff)
tgsi: Add support to parse IMM[x] too.
Thanks to Brian for pointing this out.
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_text.c28
-rw-r--r--src/gallium/tests/graw/vertex-shader/vert-rcp.sh4
2 files changed, 30 insertions, 2 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi_text.c b/src/gallium/auxiliary/tgsi/tgsi_text.c
index 68d1478d0d1..1267e79edb7 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_text.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_text.c
@@ -242,6 +242,7 @@ struct translate_ctx
struct tgsi_header *header;
unsigned processor : 4;
int implied_array_size : 5;
+ unsigned num_immediates;
};
static void report_error( struct translate_ctx *ctx, const char *msg )
@@ -1336,6 +1337,31 @@ static boolean parse_immediate( struct translate_ctx *ctx )
uint advance;
int type;
+ if (*ctx->cur == '[') {
+ uint uindex;
+
+ ++ctx->cur;
+
+ eat_opt_white( &ctx->cur );
+ if (!parse_uint( &ctx->cur, &uindex )) {
+ report_error( ctx, "Expected literal unsigned integer" );
+ return FALSE;
+ }
+
+ if (uindex != ctx->num_immediates) {
+ report_error( ctx, "Immediates must be sorted" );
+ return FALSE;
+ }
+
+ eat_opt_white( &ctx->cur );
+ if (*ctx->cur != ']') {
+ report_error( ctx, "Expected `]'" );
+ return FALSE;
+ }
+
+ ctx->cur++;
+ }
+
if (!eat_white( &ctx->cur )) {
report_error( ctx, "Syntax error" );
return FALSE;
@@ -1363,6 +1389,8 @@ static boolean parse_immediate( struct translate_ctx *ctx )
return FALSE;
ctx->tokens_cur += advance;
+ ctx->num_immediates++;
+
return TRUE;
}
diff --git a/src/gallium/tests/graw/vertex-shader/vert-rcp.sh b/src/gallium/tests/graw/vertex-shader/vert-rcp.sh
index d440e35d9a3..8843fe571ae 100644
--- a/src/gallium/tests/graw/vertex-shader/vert-rcp.sh
+++ b/src/gallium/tests/graw/vertex-shader/vert-rcp.sh
@@ -7,8 +7,8 @@ DCL OUT[1], COLOR
DCL TEMP[0]
-IMM FLT32 { 1.0, 0.0, 0.0, 0.0 }
-IMM FLT32 { 1.5, 0.0, 0.0, 0.0 }
+IMM[0] FLT32 { 1.0, 0.0, 0.0, 0.0 }
+IMM[1] FLT32 { 1.5, 0.0, 0.0, 0.0 }
ADD TEMP[0], IN[0], IMM[0]
RCP TEMP[0].x, TEMP[0].xxxx