diff options
| author | Eric Anholt <[email protected]> | 2013-04-25 14:41:36 -0700 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2013-04-29 11:41:34 -0700 |
| commit | de7e8b1d014aaecf87c2b26e8ab7e89266d5e176 (patch) | |
| tree | b8b113a1cce32f8bafe01518966839b601c6688a | |
| parent | 73bc6061f5c3b6a3bb7a8114bb2e1ab77d23cfdb (diff) | |
intel: Be more conservative in disabling tiling to save memory.
Improves GLB2.7 trex performance 1.01985% +/- 0.721366% on my IVB (n=10)
and by 3.38771% +/- 0.584241% (n=15) on my HSW, due to a 32x32 ARGB8888
cubemap going from untiled to tiled.
Reviewed-by: Daniel Vetter <[email protected]>
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c index f70228cdb04..d05eb713d8b 100644 --- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c @@ -346,11 +346,13 @@ intel_miptree_choose_tiling(struct intel_context *intel, base_format == GL_DEPTH_STENCIL_EXT)) return I915_TILING_Y; - /* If the width is smaller than a tile, don't bother tiling. */ - if (width0 < 64) + int minimum_pitch = mt->total_width * mt->cpp; + + /* If the width is much smaller than a tile, don't bother tiling. */ + if (minimum_pitch < 64) return I915_TILING_NONE; - if (ALIGN(mt->total_width * mt->cpp, 512) >= 32768) { + if (ALIGN(minimum_pitch, 512) >= 32768) { perf_debug("%dx%d miptree too large to blit, falling back to untiled", mt->total_width, mt->total_height); return I915_TILING_NONE; |