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authorRob Clark <[email protected]>2019-02-26 08:28:09 -0500
committerRob Clark <[email protected]>2019-02-26 13:19:44 -0500
commitdb1fa213745be08fd164415241f80458ee5c1a41 (patch)
treedec5c071f78be23484d3b1fdd19d4fa25c42bb01
parent79180a05662e8df535ed7829f50084f17bb2c6be (diff)
freedreno/a6xx: vertex_id is not _zero_based
Fixes dEQP-GLES31.functional.draw_base_vertex.draw_elements_base_vertex.builtin_variable.vertex_id Signed-off-by: Rob Clark <[email protected]>
-rw-r--r--src/freedreno/ir3/ir3_nir.c23
-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_program.c2
2 files changed, 24 insertions, 1 deletions
diff --git a/src/freedreno/ir3/ir3_nir.c b/src/freedreno/ir3/ir3_nir.c
index 5c568bd75c7..4f5fe5dfd65 100644
--- a/src/freedreno/ir3/ir3_nir.c
+++ b/src/freedreno/ir3/ir3_nir.c
@@ -51,9 +51,32 @@ static const nir_shader_compiler_options options = {
.lower_helper_invocation = true,
};
+/* we don't want to lower vertex_id to _zero_based on newer gpus: */
+static const nir_shader_compiler_options options_a6xx = {
+ .lower_fpow = true,
+ .lower_scmp = true,
+ .lower_flrp32 = true,
+ .lower_flrp64 = true,
+ .lower_ffract = true,
+ .lower_fmod32 = true,
+ .lower_fmod64 = true,
+ .lower_fdiv = true,
+ .lower_isign = true,
+ .lower_ldexp = true,
+ .fuse_ffma = true,
+ .native_integers = true,
+ .vertex_id_zero_based = false,
+ .lower_extract_byte = true,
+ .lower_extract_word = true,
+ .lower_all_io_to_temps = true,
+ .lower_helper_invocation = true,
+};
+
const nir_shader_compiler_options *
ir3_get_compiler_options(struct ir3_compiler *compiler)
{
+ if (compiler->gpu_id >= 600)
+ return &options_a6xx;
return &options;
}
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_program.c b/src/gallium/drivers/freedreno/a6xx/fd6_program.c
index 93e2c58b138..13c5778e427 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_program.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_program.c
@@ -305,7 +305,7 @@ setup_stateobj(struct fd_ringbuffer *ring,
pos_regid = ir3_find_output_regid(s[VS].v, VARYING_SLOT_POS);
psize_regid = ir3_find_output_regid(s[VS].v, VARYING_SLOT_PSIZ);
- vertex_regid = ir3_find_sysval_regid(s[VS].v, SYSTEM_VALUE_VERTEX_ID_ZERO_BASE);
+ vertex_regid = ir3_find_sysval_regid(s[VS].v, SYSTEM_VALUE_VERTEX_ID);
instance_regid = ir3_find_sysval_regid(s[VS].v, SYSTEM_VALUE_INSTANCE_ID);
if (s[FS].v->color0_mrt) {