freedreno/a6xx: do streamout only in binning pass

Use VPC_SO_OVERRIDE to control whether we do streamout in binning or
draw pass.  Normally we want to do streamout in binning pass, except
when there is a single tile and binning passed is skipped.

Signed-off-by: Rob Clark <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
Reviewed-by: Kristian H. Kristensen <[email protected]>

2 files changed, 16 insertions, 13 deletions

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
index 3e8d41c4b24..4edc312e993 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
@@ -757,20 +757,13 @@ fd6_emit_streamout(struct fd_ringbuffer *ring, struct fd6_emit *emit, struct ir3
 			OUT_RING(ring, REG_A6XX_VPC_SO_PROG);
 			OUT_RING(ring, tf->prog[i]);
 		}
-
-		OUT_PKT4(ring, REG_A6XX_VPC_SO_OVERRIDE, 1);
-		OUT_RING(ring, 0x0);
 	} else {
 		OUT_PKT7(ring, CP_CONTEXT_REG_BUNCH, 4);
 		OUT_RING(ring, REG_A6XX_VPC_SO_CNTL);
 		OUT_RING(ring, 0);
 		OUT_RING(ring, REG_A6XX_VPC_SO_BUF_CNTL);
 		OUT_RING(ring, 0);
-
-		OUT_PKT4(ring, REG_A6XX_VPC_SO_OVERRIDE, 1);
-		OUT_RING(ring, A6XX_VPC_SO_OVERRIDE_SO_DISABLE);
 	}
-
 }
 
 void
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
index 7ac1bae13ee..678541c0b54 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
@@ -762,11 +762,19 @@ fd6_emit_tile_init(struct fd_batch *batch)
 	patch_fb_read(batch);
 
 	if (use_hw_binning(batch)) {
+		/* enable stream-out during binning pass: */
+		OUT_PKT4(ring, REG_A6XX_VPC_SO_OVERRIDE, 1);
+		OUT_RING(ring, 0);
+
 		set_bin_size(ring, gmem->bin_w, gmem->bin_h,
 				A6XX_RB_BIN_CONTROL_BINNING_PASS | 0x6000000);
 		update_render_cntl(batch, pfb, true);
 		emit_binning_pass(batch);
 
+		/* and disable stream-out for draw pass: */
+		OUT_PKT4(ring, REG_A6XX_VPC_SO_OVERRIDE, 1);
+		OUT_RING(ring, A6XX_VPC_SO_OVERRIDE_SO_DISABLE);
+
 		/*
 		 * NOTE: even if we detect VSC overflow and disable use of
 		 * visibility stream in draw pass, it is still safe to execute
@@ -788,6 +796,10 @@ fd6_emit_tile_init(struct fd_batch *batch)
 		OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1);
 		OUT_RING(ring, 0x1);
 	} else {
+		/* no binning pass, so enable stream-out for draw pass:: */
+		OUT_PKT4(ring, REG_A6XX_VPC_SO_OVERRIDE, 1);
+		OUT_RING(ring, 0);
+
 		set_bin_size(ring, gmem->bin_w, gmem->bin_h, 0x6000000);
 	}
 
@@ -834,9 +846,6 @@ fd6_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile)
 
 	set_scissor(ring, x1, y1, x2, y2);
 
-	OUT_PKT4(ring, REG_A6XX_VPC_SO_OVERRIDE, 1);
-	OUT_RING(ring, A6XX_VPC_SO_OVERRIDE_SO_DISABLE);
-
 	if (use_hw_binning(batch)) {
 		struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[tile->p];
 
@@ -886,9 +895,6 @@ fd6_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile)
 		struct fd_gmem_stateobj *gmem = &batch->ctx->gmem;
 		set_bin_size(ring, gmem->bin_w, gmem->bin_h, 0x6000000);
 
-		OUT_PKT4(ring, REG_A6XX_VPC_SO_OVERRIDE, 1);
-		OUT_RING(ring, A6XX_VPC_SO_OVERRIDE_SO_DISABLE);
-
 		OUT_PKT7(ring, CP_SET_MODE, 1);
 		OUT_RING(ring, 0x0);
 
@@ -1450,6 +1456,10 @@ fd6_emit_sysmem_prep(struct fd_batch *batch)
 	OUT_PKT4(ring, REG_A6XX_RB_CCU_CNTL, 1);
 	OUT_RING(ring, 0x10000000);   /* RB_CCU_CNTL */
 
+	/* enable stream-out, with sysmem there is only one pass: */
+	OUT_PKT4(ring, REG_A6XX_VPC_SO_OVERRIDE, 1);
+	OUT_RING(ring, 0);
+
 	set_scissor(ring, 0, 0, pfb->width - 1, pfb->height - 1);
 
 	set_window_offset(ring, 0, 0);