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authorAlyssa Rosenzweig <[email protected]>2020-03-27 21:29:56 -0400
committerMarge Bot <[email protected]>2020-03-31 01:12:26 +0000
commitc12a208d78203ccd5377b7b3291018c5d2f5b08a (patch)
tree56ac1776c905786678ca78e59209479bf17cdf94
parentf81b67b857bd941ada721aa77ccbf430456eff0c (diff)
pan/bi: Add v2f16 versions of rounding ops
Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4382>
-rw-r--r--src/panfrost/bifrost/disassemble.c24
1 files changed, 16 insertions, 8 deletions
diff --git a/src/panfrost/bifrost/disassemble.c b/src/panfrost/bifrost/disassemble.c
index cef8b58462e..3d1da926527 100644
--- a/src/panfrost/bifrost/disassemble.c
+++ b/src/panfrost/bifrost/disassemble.c
@@ -532,13 +532,18 @@ static const struct fma_op_info FMAOpInfos[] = {
{ true, 0x00bc0, "UMAX3", FMA_THREE_SRC },
{ true, 0x00c00, "IMIN3", FMA_THREE_SRC },
{ true, 0x00c40, "UMIN3", FMA_THREE_SRC },
- { true, 0x00ec5, "ROUND", FMA_ONE_SRC },
+ { true, 0x00ec2, "ROUND.v2f16", FMA_ONE_SRC },
+ { true, 0x00ec5, "ROUND.f32", FMA_ONE_SRC },
{ true, 0x00f40, "CSEL", FMA_THREE_SRC }, // src2 != 0 ? src1 : src0
{ true, 0x00fc0, "MUX.i32", FMA_THREE_SRC }, // see ADD comment
- { true, 0x01805, "ROUNDEVEN", FMA_ONE_SRC },
- { true, 0x01845, "CEIL", FMA_ONE_SRC },
- { true, 0x01885, "FLOOR", FMA_ONE_SRC },
- { true, 0x018c5, "TRUNC", FMA_ONE_SRC },
+ { true, 0x01802, "ROUNDEVEN.v2f16", FMA_ONE_SRC },
+ { true, 0x01805, "ROUNDEVEN.f32", FMA_ONE_SRC },
+ { true, 0x01842, "CEIL.v2f16", FMA_ONE_SRC },
+ { true, 0x01845, "CEIL.f32", FMA_ONE_SRC },
+ { true, 0x01882, "FLOOR.v2f16", FMA_ONE_SRC },
+ { true, 0x01885, "FLOOR.f32", FMA_ONE_SRC },
+ { true, 0x018c2, "TRUNC.v2f16", FMA_ONE_SRC },
+ { true, 0x018c5, "TRUNC.f32", FMA_ONE_SRC },
{ true, 0x019b0, "ATAN_LDEXP.Y.f32", FMA_TWO_SRC },
{ true, 0x019b8, "ATAN_LDEXP.X.f32", FMA_TWO_SRC },
{ true, 0x01c80, "LSHIFT_ADD_LOW32.u32", FMA_SHIFT_ADD64 },
@@ -1001,9 +1006,12 @@ static const struct add_op_info add_op_infos[] = {
{ 0x07ba5, "FSQRT_FREXPE", ADD_ONE_SRC },
{ 0x07bad, "FRSQ_FREXPE", ADD_ONE_SRC },
{ 0x07bc5, "FLOG_FREXPE", ADD_ONE_SRC },
- { 0x07d45, "CEIL", ADD_ONE_SRC },
- { 0x07d85, "FLOOR", ADD_ONE_SRC },
- { 0x07dc5, "TRUNC", ADD_ONE_SRC },
+ { 0x07d42, "CEIL.v2f16", ADD_ONE_SRC },
+ { 0x07d45, "CEIL.f32", ADD_ONE_SRC },
+ { 0x07d82, "FLOOR.v2f16", ADD_ONE_SRC },
+ { 0x07d85, "FLOOR.f32", ADD_ONE_SRC },
+ { 0x07dc2, "TRUNC.v2f16", ADD_ONE_SRC },
+ { 0x07dc5, "TRUNC.f32", ADD_ONE_SRC },
{ 0x07f18, "LSHIFT_ADD_HIGH32.i32", ADD_TWO_SRC },
{ 0x08000, "LD_ATTR", ADD_LOAD_ATTR, true },
{ 0x0a000, "LD_VAR.32", ADD_VARYING_INTERP, true },