diff options
| author | Jason Ekstrand <[email protected]> | 2020-01-07 14:58:45 -0600 |
|---|---|---|
| committer | Marge Bot <[email protected]> | 2020-01-13 17:23:47 +0000 |
| commit | bd3ab75aef95d062cedaa92504fede9887a2c370 (patch) | |
| tree | 97201ade8db5f3daaa0c205340f96e9d4cdb3d0a | |
| parent | ba43b66dc996988ec326d35395e9699ea4f66fdf (diff) | |
intel/nir: Stop adding redundant barriers
Now that both GLSL and SPIR-V are adding shared and tcs_patch barriers
(as appropreate) prior to the nir_intrinsic_barrier, we don't need to do
it ourselves in the back-end. This reverts commit
26e950a5de01564e3b5f2148ae994454ae5205fe.
Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
| -rw-r--r-- | src/intel/compiler/brw_nir_lower_cs_intrinsics.c | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/src/intel/compiler/brw_nir_lower_cs_intrinsics.c b/src/intel/compiler/brw_nir_lower_cs_intrinsics.c index 3f48a3c5dda..434ad005281 100644 --- a/src/intel/compiler/brw_nir_lower_cs_intrinsics.c +++ b/src/intel/compiler/brw_nir_lower_cs_intrinsics.c @@ -55,20 +55,6 @@ lower_cs_intrinsics_convert_block(struct lower_intrinsics_state *state, nir_ssa_def *sysval; switch (intrinsic->intrinsic) { - case nir_intrinsic_barrier: { - /* Our HW barrier instruction doesn't do a memory barrier for us but - * the GLSL barrier() intrinsic does for shared memory. Insert a - * shared memory barrier before every barrier(). - */ - b->cursor = nir_before_instr(&intrinsic->instr); - - nir_intrinsic_instr *shared_barrier = - nir_intrinsic_instr_create(b->shader, - nir_intrinsic_memory_barrier_shared); - nir_builder_instr_insert(b, &shared_barrier->instr); - continue; - } - case nir_intrinsic_load_local_invocation_index: case nir_intrinsic_load_local_invocation_id: { /* First time we are using those, so let's calculate them. */ |