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authorRob Clark <[email protected]>2019-06-06 09:45:25 -0700
committerRob Clark <[email protected]>2019-06-07 12:07:29 -0700
commitb820c09fa8d1ce362cac0bc6e71693578d115563 (patch)
treeb8a05ecdb5585f969b2339f50c18a538e77fe449
parentb4198e792c037dccb4d433abc1368bd8cc8d22ee (diff)
freedreno/a6xx: fix issues with gallium HUD
In some cases the draw for the text wasn't working. This seems to be fixed by resyncing some of the "golded registers" from blob (initial values were based on somewhat older blob version). Perhaps good to have a bit of soak time on master, but would be good to eventually land in 19.x stable branches. Cc: [email protected] Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_emit.c13
1 files changed, 8 insertions, 5 deletions
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
index 846cd4f141e..a48fc11721f 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
@@ -1155,14 +1155,14 @@ t7 opcode: CP_WAIT_FOR_IDLE (26) (1 dwords)
WRITE(REG_A6XX_VPC_UNKNOWN_9600, 0);
WRITE(REG_A6XX_GRAS_UNKNOWN_8600, 0x880);
- WRITE(REG_A6XX_HLSQ_UNKNOWN_BE04, 0);
- WRITE(REG_A6XX_SP_UNKNOWN_AE03, 0x00000410);
+ WRITE(REG_A6XX_HLSQ_UNKNOWN_BE04, 0x80000);
+ WRITE(REG_A6XX_SP_UNKNOWN_AE03, 0x1430);
WRITE(REG_A6XX_SP_IBO_COUNT, 0);
WRITE(REG_A6XX_SP_UNKNOWN_B182, 0);
WRITE(REG_A6XX_HLSQ_UNKNOWN_BB11, 0);
WRITE(REG_A6XX_UCHE_UNKNOWN_0E12, 0x3200000);
WRITE(REG_A6XX_UCHE_CLIENT_PF, 4);
- WRITE(REG_A6XX_RB_UNKNOWN_8E01, 0x0);
+ WRITE(REG_A6XX_RB_UNKNOWN_8E01, 0x1);
WRITE(REG_A6XX_SP_UNKNOWN_AB00, 0x5);
WRITE(REG_A6XX_VFD_UNKNOWN_A009, 0x00000001);
WRITE(REG_A6XX_RB_UNKNOWN_8811, 0x00000010);
@@ -1173,7 +1173,7 @@ t7 opcode: CP_WAIT_FOR_IDLE (26) (1 dwords)
WRITE(REG_A6XX_GRAS_UNKNOWN_8101, 0);
WRITE(REG_A6XX_GRAS_SAMPLE_CNTL, 0);
- WRITE(REG_A6XX_GRAS_UNKNOWN_8110, 0);
+ WRITE(REG_A6XX_GRAS_UNKNOWN_8110, 0x2);
WRITE(REG_A6XX_RB_RENDER_CONTROL0, 0x401);
WRITE(REG_A6XX_RB_RENDER_CONTROL1, 0);
@@ -1219,7 +1219,10 @@ t7 opcode: CP_WAIT_FOR_IDLE (26) (1 dwords)
WRITE(REG_A6XX_PC_UNKNOWN_9E72, 0);
WRITE(REG_A6XX_VPC_UNKNOWN_9108, 0x3);
WRITE(REG_A6XX_SP_TP_UNKNOWN_B304, 0);
- WRITE(REG_A6XX_SP_TP_UNKNOWN_B309, 0x000000a2);
+ /* NOTE blob seems to (mostly?) use 0xb2 for SP_TP_UNKNOWN_B309
+ * but this seems to kill texture gather offsets.
+ */
+ WRITE(REG_A6XX_SP_TP_UNKNOWN_B309, 0xa2);
WRITE(REG_A6XX_RB_UNKNOWN_8804, 0);
WRITE(REG_A6XX_GRAS_UNKNOWN_80A4, 0);
WRITE(REG_A6XX_GRAS_UNKNOWN_80A5, 0);