diff options
author | Samuel Pitoiset <[email protected]> | 2018-11-12 11:37:20 +0100 |
---|---|---|
committer | Samuel Pitoiset <[email protected]> | 2018-11-13 10:24:31 +0100 |
commit | b5f213bb1dcde22949dffe9d3a431fecd5d0f33b (patch) | |
tree | c2c303ccb292b5fd3d7120fff3f818751787147e | |
parent | c5f3013cba2b11198643310386915c10d38377f7 (diff) |
radv: binding streamout buffers doesn't change context regs
Cc: 18.3 <[email protected]>
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
-rw-r--r-- | src/amd/vulkan/radv_cmd_buffer.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index ee5373950f6..1f22fda7c55 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -3541,8 +3541,13 @@ static bool radv_need_late_scissor_emission(struct radv_cmd_buffer *cmd_buffer, uint32_t used_states = cmd_buffer->state.pipeline->graphics.needed_dynamic_state | ~RADV_CMD_DIRTY_DYNAMIC_ALL; - /* Index & Vertex buffer don't change context regs, and pipeline is handled later. */ - used_states &= ~(RADV_CMD_DIRTY_INDEX_BUFFER | RADV_CMD_DIRTY_VERTEX_BUFFER | RADV_CMD_DIRTY_PIPELINE); + /* Index, vertex and streamout buffers don't change context regs, and + * pipeline is handled later. + */ + used_states &= ~(RADV_CMD_DIRTY_INDEX_BUFFER | + RADV_CMD_DIRTY_VERTEX_BUFFER | + RADV_CMD_DIRTY_STREAMOUT_BUFFER | + RADV_CMD_DIRTY_PIPELINE); /* Assume all state changes except these two can imply context rolls. */ if (cmd_buffer->state.dirty & used_states) |