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authorRhys Perry <[email protected]>2020-06-11 14:06:32 +0100
committerMarge Bot <[email protected]>2020-06-15 18:24:22 +0000
commita02e7f679975bba76ee2a5c64b5b43432619b5a5 (patch)
treef991aee0bbb850eef610466bd3a8d6cf895a85f5
parent82c265a51467ec8c112146bc7a2875609d5be0cf (diff)
aco: fix encoding of certain s_setreg_imm32_b32 instructions
If the mode is too small, the operand will be an inline constant and the literal dword won't be written. Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
-rw-r--r--src/amd/compiler/aco_lower_to_hw_instr.cpp4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/amd/compiler/aco_lower_to_hw_instr.cpp b/src/amd/compiler/aco_lower_to_hw_instr.cpp
index 5e93dc603e6..441e1b6b8e5 100644
--- a/src/amd/compiler/aco_lower_to_hw_instr.cpp
+++ b/src/amd/compiler/aco_lower_to_hw_instr.cpp
@@ -1658,7 +1658,9 @@ void lower_to_hw_instr(Program* program)
assert(block->kind & block_kind_top_level);
uint32_t mode = block->fp_mode.val;
/* "((size - 1) << 11) | register" (MODE is encoded as register 1) */
- bld.sopk(aco_opcode::s_setreg_imm32_b32, Operand(mode), (7 << 11) | 1);
+ Instruction *instr = bld.sopk(aco_opcode::s_setreg_imm32_b32, Operand(mode), (7 << 11) | 1).instr;
+ /* has to be a literal */
+ instr->operands[0].setFixed(PhysReg{255});
}
for (size_t j = 0; j < block->instructions.size(); j++) {