diff options
author | Marek Olšák <[email protected]> | 2019-07-12 17:20:36 -0400 |
---|---|---|
committer | Marek Olšák <[email protected]> | 2019-07-19 20:16:19 -0400 |
commit | 921c1d24d5ea17e5448c1f464416397e6fa9e418 (patch) | |
tree | 032a39390e354eff8416a7ffde64b384bb997d6a | |
parent | 73aa04e40d5fa7ec5f7d37d939a324be06518a47 (diff) |
ac/rtld: add support for Wave32
Reviewed-by: Samuel Pitoiset <[email protected]>
-rw-r--r-- | src/amd/common/ac_binary.c | 13 | ||||
-rw-r--r-- | src/amd/common/ac_binary.h | 1 | ||||
-rw-r--r-- | src/amd/common/ac_rtld.c | 4 | ||||
-rw-r--r-- | src/amd/common/ac_rtld.h | 2 | ||||
-rw-r--r-- | src/amd/vulkan/radv_shader.c | 1 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_compute.c | 1 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_debug.c | 1 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_shader.c | 3 |
8 files changed, 21 insertions, 5 deletions
diff --git a/src/amd/common/ac_binary.c b/src/amd/common/ac_binary.c index 652ff228032..6cf05daac55 100644 --- a/src/amd/common/ac_binary.c +++ b/src/amd/common/ac_binary.c @@ -37,10 +37,11 @@ /* Parse configuration data in .AMDGPU.config section format. */ void ac_parse_shader_binary_config(const char *data, size_t nbytes, + unsigned wave_size, bool really_needs_scratch, struct ac_shader_config *conf) { - uint32_t wavesize = 0; + uint32_t scratch_size = 0; for (size_t i = 0; i < nbytes; i += 8) { unsigned reg = util_le32_to_cpu(*(uint32_t*)(data + i)); @@ -51,8 +52,12 @@ void ac_parse_shader_binary_config(const char *data, size_t nbytes, case R_00B228_SPI_SHADER_PGM_RSRC1_GS: case R_00B848_COMPUTE_PGM_RSRC1: case R_00B428_SPI_SHADER_PGM_RSRC1_HS: + if (wave_size == 32) + conf->num_vgprs = MAX2(conf->num_vgprs, (G_00B028_VGPRS(value) + 1) * 8); + else + conf->num_vgprs = MAX2(conf->num_vgprs, (G_00B028_VGPRS(value) + 1) * 4); + conf->num_sgprs = MAX2(conf->num_sgprs, (G_00B028_SGPRS(value) + 1) * 8); - conf->num_vgprs = MAX2(conf->num_vgprs, (G_00B028_VGPRS(value) + 1) * 4); conf->float_mode = G_00B028_FLOAT_MODE(value); conf->rsrc1 = value; break; @@ -72,7 +77,7 @@ void ac_parse_shader_binary_config(const char *data, size_t nbytes, case R_0286E8_SPI_TMPRING_SIZE: case R_00B860_COMPUTE_TMPRING_SIZE: /* WAVESIZE is in units of 256 dwords. */ - wavesize = value; + scratch_size = value; break; case SPILLED_SGPRS: conf->spilled_sgprs = value; @@ -99,6 +104,6 @@ void ac_parse_shader_binary_config(const char *data, size_t nbytes, if (really_needs_scratch) { /* sgprs spills aren't spilling */ - conf->scratch_bytes_per_wave = G_00B860_WAVESIZE(wavesize) * 256 * 4; + conf->scratch_bytes_per_wave = G_00B860_WAVESIZE(scratch_size) * 256 * 4; } } diff --git a/src/amd/common/ac_binary.h b/src/amd/common/ac_binary.h index 53138f11810..1276df49369 100644 --- a/src/amd/common/ac_binary.h +++ b/src/amd/common/ac_binary.h @@ -47,6 +47,7 @@ struct ac_shader_config { }; void ac_parse_shader_binary_config(const char *data, size_t nbytes, + unsigned wave_size, bool really_needs_scratch, struct ac_shader_config *conf); diff --git a/src/amd/common/ac_rtld.c b/src/amd/common/ac_rtld.c index 55315913234..a1bb51a8a88 100644 --- a/src/amd/common/ac_rtld.c +++ b/src/amd/common/ac_rtld.c @@ -262,6 +262,7 @@ bool ac_rtld_open(struct ac_rtld_binary *binary, memset(binary, 0, sizeof(*binary)); memcpy(&binary->options, &i.options, sizeof(binary->options)); + binary->wave_size = i.wave_size; binary->num_parts = i.num_parts; binary->parts = calloc(sizeof(*binary->parts), i.num_parts); if (!binary->parts) @@ -523,7 +524,8 @@ bool ac_rtld_read_config(struct ac_rtld_binary *binary, /* TODO: be precise about scratch use? */ struct ac_shader_config c = {}; - ac_parse_shader_binary_config(config_data, config_nbytes, true, &c); + ac_parse_shader_binary_config(config_data, config_nbytes, + binary->wave_size, true, &c); config->num_sgprs = MAX2(config->num_sgprs, c.num_sgprs); config->num_vgprs = MAX2(config->num_vgprs, c.num_vgprs); diff --git a/src/amd/common/ac_rtld.h b/src/amd/common/ac_rtld.h index 3f60444f85e..55faaa011db 100644 --- a/src/amd/common/ac_rtld.h +++ b/src/amd/common/ac_rtld.h @@ -52,6 +52,7 @@ struct ac_rtld_options { /* Lightweight wrapper around underlying ELF objects. */ struct ac_rtld_binary { struct ac_rtld_options options; + unsigned wave_size; /* Required buffer sizes, currently read/executable only. */ uint64_t rx_size; @@ -86,6 +87,7 @@ struct ac_rtld_open_info { const struct radeon_info *info; struct ac_rtld_options options; gl_shader_stage shader_type; + unsigned wave_size; unsigned num_parts; const char * const *elf_ptrs; /* in-memory ELF objects of each part */ diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 17ce6d3ef54..3b00bf800b9 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -961,6 +961,7 @@ radv_shader_variant_create(struct radv_device *device, struct ac_rtld_open_info open_info = { .info = &device->physical_device->rad_info, .shader_type = binary->stage, + .wave_size = 64, .num_parts = 1, .elf_ptrs = &elf_data, .elf_sizes = &elf_size, diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c index c0b59915b1f..97f692a18dc 100644 --- a/src/gallium/drivers/radeonsi/si_compute.c +++ b/src/gallium/drivers/radeonsi/si_compute.c @@ -68,6 +68,7 @@ static const amd_kernel_code_t *si_compute_get_code_object( if (!ac_rtld_open(&rtld, (struct ac_rtld_open_info){ .info = &sel->screen->info, .shader_type = MESA_SHADER_COMPUTE, + .wave_size = 64, .num_parts = 1, .elf_ptrs = &program->shader.binary.elf_buffer, .elf_sizes = &program->shader.binary.elf_size })) diff --git a/src/gallium/drivers/radeonsi/si_debug.c b/src/gallium/drivers/radeonsi/si_debug.c index 7d2f492fcc8..6eddfcbe8dc 100644 --- a/src/gallium/drivers/radeonsi/si_debug.c +++ b/src/gallium/drivers/radeonsi/si_debug.c @@ -944,6 +944,7 @@ static void si_add_split_disasm(struct si_screen *screen, if (!ac_rtld_open(rtld_binary, (struct ac_rtld_open_info){ .info = &screen->info, .shader_type = tgsi_processor_to_shader_stage(shader_type), + .wave_size = 64, .num_parts = 1, .elf_ptrs = &binary->elf_buffer, .elf_sizes = &binary->elf_size })) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 8017210ccd2..b41e1e62522 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -5258,6 +5258,7 @@ static bool si_shader_binary_open(struct si_screen *screen, .halt_at_entry = screen->options.halt_shaders, }, .shader_type = tgsi_processor_to_shader_stage(sel->type), + .wave_size = 64, .num_parts = num_parts, .elf_ptrs = part_elfs, .elf_sizes = part_sizes, @@ -5352,6 +5353,7 @@ static void si_shader_dump_disassembly(struct si_screen *screen, if (!ac_rtld_open(&rtld_binary, (struct ac_rtld_open_info){ .info = &screen->info, .shader_type = tgsi_processor_to_shader_stage(shader_type), + .wave_size = 64, .num_parts = 1, .elf_ptrs = &binary->elf_buffer, .elf_sizes = &binary->elf_size })) @@ -5642,6 +5644,7 @@ static int si_compile_llvm(struct si_screen *sscreen, if (!ac_rtld_open(&rtld, (struct ac_rtld_open_info){ .info = &sscreen->info, .shader_type = tgsi_processor_to_shader_stage(shader_type), + .wave_size = 64, .num_parts = 1, .elf_ptrs = &binary->elf_buffer, .elf_sizes = &binary->elf_size })) |