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authorRhys Perry <[email protected]>2019-10-03 17:15:34 +0100
committerRhys Perry <[email protected]>2019-10-21 19:18:30 +0000
commit73184e51d1cbb9f22b02e8c9f46e9dec116c63dc (patch)
treefe61e2324bec91270b048ab844746a20ab2424d8
parent132ae89b1908dc1ba8483e72ded9380764d8435c (diff)
aco: run opt_algebraic in a loop
Totals from affected shaders: SGPRS: 13920 -> 13656 (-1.90 %) VGPRS: 12972 -> 12960 (-0.09 %) Spilled SGPRs: 0 -> 0 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Private memory VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 1005680 -> 1000648 (-0.50 %) bytes LDS: 91 -> 91 (0.00 %) blocks Max Waves: 688 -> 688 (0.00 %) Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
-rw-r--r--src/amd/compiler/aco_instruction_selection_setup.cpp11
1 files changed, 8 insertions, 3 deletions
diff --git a/src/amd/compiler/aco_instruction_selection_setup.cpp b/src/amd/compiler/aco_instruction_selection_setup.cpp
index 9727020a8a9..b100ace3c8c 100644
--- a/src/amd/compiler/aco_instruction_selection_setup.cpp
+++ b/src/amd/compiler/aco_instruction_selection_setup.cpp
@@ -1331,9 +1331,14 @@ setup_isel_context(Program* program,
nir_lower_idiv(nir, nir_lower_idiv_precise);
/* optimize the lowered ALU operations */
- nir_copy_prop(nir);
- nir_opt_constant_folding(nir);
- nir_opt_algebraic(nir);
+ bool more_algebraic = true;
+ while (more_algebraic) {
+ more_algebraic = false;
+ NIR_PASS_V(nir, nir_copy_prop);
+ NIR_PASS_V(nir, nir_opt_dce);
+ NIR_PASS_V(nir, nir_opt_constant_folding);
+ NIR_PASS(more_algebraic, nir, nir_opt_algebraic);
+ }
/* Do late algebraic optimization to turn add(a, neg(b)) back into
* subs, then the mandatory cleanup after algebraic. Note that it may