diff options
| author | Dave Airlie <[email protected]> | 2011-10-22 20:08:44 +0100 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2011-10-22 20:15:57 +0100 |
| commit | 608a7009d93d589a93a90a4d8edb9fdf360c98a6 (patch) | |
| tree | 2d6556defcff5a023507aa7a1324a073f5f14ad6 | |
| parent | 409748ac0b92aacae6ad9c2bcedca4fef8986eea (diff) | |
r600g: drop specific i2f it should be a trans only op2.
Signed-off-by: Dave Airlie <[email protected]>
| -rw-r--r-- | src/gallium/drivers/r600/r600_shader.c | 28 |
1 files changed, 1 insertions, 27 deletions
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c index b385524ac96..8939143d664 100644 --- a/src/gallium/drivers/r600/r600_shader.c +++ b/src/gallium/drivers/r600/r600_shader.c @@ -1010,32 +1010,6 @@ static int tgsi_last_instruction(unsigned writemask) return lasti; } -static int tgsi_int_to_flt(struct r600_shader_ctx *ctx) -{ - struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction; - struct r600_bytecode_alu alu; - int i, j, r; - int lasti = tgsi_last_instruction(inst->Dst[0].Register.WriteMask); - - for (i = 0; i < lasti + 1; i++) { - if (!(inst->Dst[0].Register.WriteMask & (1 << i))) - continue; - - memset(&alu, 0, sizeof(struct r600_bytecode_alu)); - tgsi_dst(ctx, &inst->Dst[0], i, &alu.dst); - - alu.inst = ctx->inst_info->r600_opcode; - for (j = 0; j < inst->Instruction.NumSrcRegs; j++) { - r600_bytecode_src(&alu.src[j], &ctx->src[j], i); - } - alu.last = 1; - r = r600_bytecode_add_alu(ctx->bc, &alu); - if (r) - return r; - } - return 0; -} - static int tgsi_op2_s(struct r600_shader_ctx *ctx, int swap, int trans_only) { struct tgsi_full_instruction *inst = &ctx->parse.FullToken.FullInstruction; @@ -3671,7 +3645,7 @@ static struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = { {TGSI_OPCODE_PUSHA, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, {TGSI_OPCODE_POPA, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, {TGSI_OPCODE_CEIL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, - {TGSI_OPCODE_I2F, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT, tgsi_int_to_flt}, + {TGSI_OPCODE_I2F, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_INT_TO_FLT, tgsi_op2_trans}, {TGSI_OPCODE_NOT, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOT_INT, tgsi_op2}, {TGSI_OPCODE_TRUNC, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_TRUNC, tgsi_op2}, {TGSI_OPCODE_SHL, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_NOP, tgsi_unsupported}, |