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authorNanley Chery <[email protected]>2016-09-28 15:51:35 -0700
committerNanley Chery <[email protected]>2016-11-18 12:12:50 -0800
commit37c07d64b4d52e7053c6228dfaedbb1fbee74abf (patch)
tree1bed5ffb63c977af8a7210456d86d9d1dfe6c5f7
parent6ff4c24fdd3ea078da5eba7c71fcbdf4c481d440 (diff)
anv/cmd_buffer: Manage Anv state around HZ op emission
Move the assignment to a less surprising location. Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
-rw-r--r--src/intel/vulkan/gen8_cmd_buffer.c16
1 files changed, 9 insertions, 7 deletions
diff --git a/src/intel/vulkan/gen8_cmd_buffer.c b/src/intel/vulkan/gen8_cmd_buffer.c
index 0b1d5bfe7cd..c04dc248434 100644
--- a/src/intel/vulkan/gen8_cmd_buffer.c
+++ b/src/intel/vulkan/gen8_cmd_buffer.c
@@ -455,9 +455,6 @@ genX(cmd_buffer_emit_hz_op)(struct anv_cmd_buffer *cmd_buffer,
hzp.FullSurfaceDepthandStencilClear = full_surface_op;
hzp.StencilClearValue =
cmd_state->attachments[ds].clear_value.depthStencil.stencil & 0xff;
-
- /* Mark aspects as cleared */
- cmd_state->attachments[ds].pending_clear_aspects = 0;
break;
case BLORP_HIZ_OP_DEPTH_RESOLVE:
hzp.DepthBufferResolveEnable = true;
@@ -506,11 +503,16 @@ genX(cmd_buffer_emit_hz_op)(struct anv_cmd_buffer *cmd_buffer,
anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_WM_HZ_OP), hzp);
- if (!full_surface_op && op == BLORP_HIZ_OP_DEPTH_CLEAR) {
- anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
- pc.DepthStallEnable = true;
- pc.DepthCacheFlushEnable = true;
+ if (op == BLORP_HIZ_OP_DEPTH_CLEAR) {
+ if (!full_surface_op) {
+ anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
+ pc.DepthStallEnable = true;
+ pc.DepthCacheFlushEnable = true;
+ }
}
+
+ /* Mark aspects as cleared */
+ cmd_state->attachments[ds].pending_clear_aspects = 0;
}
}