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authorNicolai Hähnle <[email protected]>2016-08-08 17:06:22 +0200
committerNicolai Hähnle <[email protected]>2016-08-09 15:56:03 +0200
commit2852dedaa0c45e426a53ba0042ecdb0f1b87950f (patch)
treecbb83e361477770537dd0c76aee69f4ec6b41016
parent76c4a3b567606d635c42809570a18089b4a41f9c (diff)
radeonsi: flush TC L2 cache for indirect draw data
This fixes a bug when indirect draw data is generated by transform feedback. Cc: [email protected] Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
-rw-r--r--src/gallium/drivers/radeonsi/si_descriptors.c8
-rw-r--r--src/gallium/drivers/radeonsi/si_state_draw.c5
2 files changed, 9 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index 224cf3513c8..7600671d07e 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -1242,10 +1242,10 @@ static void si_set_streamout_targets(struct pipe_context *ctx,
* and most other clients can use TC L2 as well, we don't need
* to flush it.
*
- * The only case which requires flushing it is VGT DMA index
- * fetching, which is a rare case. Thus, flag the TC L2
- * dirtiness in the resource and handle it when index fetching
- * is used.
+ * The only cases which requires flushing it is VGT DMA index
+ * fetching (on <= CIK) and indirect draw data, which are rare
+ * cases. Thus, flag the TC L2 dirtiness in the resource and
+ * handle it at draw call time.
*/
for (i = 0; i < sctx->b.streamout.num_targets; i++)
if (sctx->b.streamout.targets[i])
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index a60723d225d..b5593064131 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -967,6 +967,11 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
r600_resource(ib.buffer)->TC_L2_dirty = false;
}
+ if (info->indirect && r600_resource(info->indirect)->TC_L2_dirty) {
+ sctx->b.flags |= SI_CONTEXT_INV_GLOBAL_L2;
+ r600_resource(info->indirect)->TC_L2_dirty = false;
+ }
+
/* Check flush flags. */
if (sctx->b.flags)
si_mark_atom_dirty(sctx, sctx->atoms.s.cache_flush);