diff options
author | Samuel Pitoiset <[email protected]> | 2020-05-04 16:03:35 +0200 |
---|---|---|
committer | Marge Bot <[email protected]> | 2020-05-11 07:25:16 +0000 |
commit | 266978f7cabe2c09e5538ef1b79efdd96b2cba00 (patch) | |
tree | 8a3bde40647e24c302f2cb2df1cb6d6a2cf6c56e | |
parent | 04718a9cd63cea9d815bffd91495069a79db8ac5 (diff) |
aco: prevent invalid loads/stores vectorization if robustness is enabled
Only UBO, SSBO, global and push constants accesses should matter.
This fixes a bunch of new robustness2 failures. Note that RADV/LLVM
isn't affected because it relies on LLVM for loads/stores
vectorization and LLVM doesn't vectorize in this situation as well.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Rhys Perry <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4881>
-rw-r--r-- | src/amd/compiler/aco_instruction_selection_setup.cpp | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/src/amd/compiler/aco_instruction_selection_setup.cpp b/src/amd/compiler/aco_instruction_selection_setup.cpp index f1fde789e7b..44659b46229 100644 --- a/src/amd/compiler/aco_instruction_selection_setup.cpp +++ b/src/amd/compiler/aco_instruction_selection_setup.cpp @@ -994,12 +994,20 @@ setup_nir(isel_context *ctx, nir_shader *nir) bool lower_to_scalar = false; bool lower_pack = false; + nir_variable_mode robust_modes = (nir_variable_mode)0; + + if (ctx->options->robust_buffer_access) { + robust_modes = (nir_variable_mode)(nir_var_mem_ubo | + nir_var_mem_ssbo | + nir_var_mem_global | + nir_var_mem_push_const); + } + if (nir_opt_load_store_vectorize(nir, (nir_variable_mode)(nir_var_mem_ssbo | nir_var_mem_ubo | nir_var_mem_push_const | nir_var_mem_shared | nir_var_mem_global), - mem_vectorize_callback, - (nir_variable_mode)0)) { + mem_vectorize_callback, robust_modes)) { lower_to_scalar = true; lower_pack = true; } |