diff options
author | Jason Ekstrand <[email protected]> | 2017-05-22 09:23:45 -0700 |
---|---|---|
committer | Jason Ekstrand <[email protected]> | 2017-06-07 22:18:53 -0700 |
commit | 25d00e72e4ba22b24cfd99240224c551d9351695 (patch) | |
tree | 95548b759f61dfd9314892dbb29e6962db8c1222 | |
parent | 64b829244b0f39e4e4d3f1611896ad6cb1ed7318 (diff) |
i965/miptree: Refactor intel_miptree_resolve_color
The new version now takes a range of levels as well as a range of
layers. It should also be a tiny bit faster because it only walks the
resolve_map list once instead of once per layer.
Reviewed-by: Topi Pohjolainen <[email protected]>
Reviewed-by: Chad Versace <[email protected]>
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_blorp.c | 3 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.c | 9 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_draw.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_blit.c | 8 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 46 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 5 |
6 files changed, 35 insertions, 38 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index 8fb9973d5cf..d9592c571f6 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.c +++ b/src/mesa/drivers/dri/i965/brw_blorp.c @@ -177,7 +177,8 @@ blorp_surf_for_miptree(struct brw_context *brw, flags |= INTEL_MIPTREE_IGNORE_CCS_E; intel_miptree_resolve_color(brw, mt, - *level, start_layer, num_layers, flags); + *level, 1, + start_layer, num_layers, flags); assert(!intel_miptree_has_color_unresolved(mt, *level, 1, start_layer, num_layers)); diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 0a5120d32dc..205103993f9 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -318,9 +318,10 @@ intel_update_state(struct gl_context * ctx, GLuint new_state) intel_renderbuffer(fb->_ColorDrawBuffers[i]); if (irb && - intel_miptree_resolve_color( - brw, irb->mt, irb->mt_level, irb->mt_layer, irb->layer_count, - INTEL_MIPTREE_IGNORE_CCS_E)) + intel_miptree_resolve_color(brw, irb->mt, + irb->mt_level, 1, + irb->mt_layer, irb->layer_count, + INTEL_MIPTREE_IGNORE_CCS_E)) brw_render_cache_set_check_flush(brw, irb->mt->bo); } } @@ -1380,7 +1381,7 @@ intel_resolve_for_dri2_flush(struct brw_context *brw, if (rb->mt->num_samples <= 1) { assert(rb->mt_layer == 0 && rb->mt_level == 0 && rb->layer_count == 1); - intel_miptree_resolve_color(brw, rb->mt, 0, 0, 1, 0); + intel_miptree_resolve_color(brw, rb->mt, 0, 1, 0, 1, 0); } else { intel_renderbuffer_downsample(brw, rb); } diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index 611cb86536f..23a3c6c5c8d 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -422,7 +422,7 @@ brw_predraw_set_aux_buffers(struct brw_context *brw) !intel_miptree_is_lossless_compressed(brw, irb->mt)) { assert(brw->gen >= 8); - intel_miptree_resolve_color(brw, irb->mt, irb->mt_level, + intel_miptree_resolve_color(brw, irb->mt, irb->mt_level, 1, irb->mt_layer, irb->layer_count, 0); } } diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index 817fe7ac56b..dc68614b4d3 100644 --- a/src/mesa/drivers/dri/i965/intel_blit.c +++ b/src/mesa/drivers/dri/i965/intel_blit.c @@ -326,8 +326,8 @@ intel_miptree_blit(struct brw_context *brw, */ intel_miptree_slice_resolve_depth(brw, src_mt, src_level, src_slice); intel_miptree_slice_resolve_depth(brw, dst_mt, dst_level, dst_slice); - intel_miptree_resolve_color(brw, src_mt, src_level, src_slice, 1, 0); - intel_miptree_resolve_color(brw, dst_mt, dst_level, dst_slice, 1, 0); + intel_miptree_resolve_color(brw, src_mt, src_level, 1, src_slice, 1, 0); + intel_miptree_resolve_color(brw, dst_mt, dst_level, 1, dst_slice, 1, 0); intel_miptree_slice_set_needs_hiz_resolve(dst_mt, dst_level, dst_slice); if (src_flip) @@ -385,8 +385,8 @@ intel_miptree_copy(struct brw_context *brw, */ intel_miptree_slice_resolve_depth(brw, src_mt, src_level, src_slice); intel_miptree_slice_resolve_depth(brw, dst_mt, dst_level, dst_slice); - intel_miptree_resolve_color(brw, src_mt, src_level, src_slice, 1, 0); - intel_miptree_resolve_color(brw, dst_mt, dst_level, dst_slice, 1, 0); + intel_miptree_resolve_color(brw, src_mt, src_level, 1, src_slice, 1, 0); + intel_miptree_resolve_color(brw, dst_mt, dst_level, 1, dst_slice, 1, 0); intel_miptree_slice_set_needs_hiz_resolve(dst_mt, dst_level, dst_slice); uint32_t src_image_x, src_image_y; diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index c4985149aab..27d4bc058f7 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -2164,33 +2164,35 @@ intel_miptree_needs_color_resolve(const struct brw_context *brw, bool intel_miptree_resolve_color(struct brw_context *brw, - struct intel_mipmap_tree *mt, unsigned level, - unsigned start_layer, unsigned num_layers, + struct intel_mipmap_tree *mt, + uint32_t start_level, uint32_t num_levels, + uint32_t start_layer, uint32_t num_layers, int flags) { - intel_miptree_check_color_resolve(brw, mt, level, start_layer); + intel_miptree_check_color_resolve(brw, mt, start_level, start_layer); if (!intel_miptree_needs_color_resolve(brw, mt, flags)) return false; - /* Arrayed fast clear is only supported for gen8+. */ - assert(brw->gen >= 8 || num_layers == 1); - bool resolved = false; - for (unsigned i = 0; i < num_layers; ++i) { - intel_miptree_check_level_layer(mt, level, start_layer + i); + foreach_list_typed_safe(struct intel_resolve_map, map, link, + &mt->color_resolve_map) { + if (map->level < start_level || + map->level >= (start_level + num_levels) || + map->layer < start_layer || + map->layer >= (start_layer + num_layers)) + continue; - struct intel_resolve_map *item = - intel_resolve_map_get(&mt->color_resolve_map, level, - start_layer + i); + /* Arrayed and mip-mapped fast clear is only supported for gen8+. */ + assert(brw->gen >= 8 || (map->level == 0 && map->layer == 0)); - if (item) { - assert(item->fast_clear_state != INTEL_FAST_CLEAR_STATE_RESOLVED); + intel_miptree_check_level_layer(mt, map->level, map->layer); - brw_blorp_resolve_color(brw, mt, level, start_layer); - intel_resolve_map_remove(item); - resolved = true; - } + assert(map->fast_clear_state != INTEL_FAST_CLEAR_STATE_RESOLVED); + + brw_blorp_resolve_color(brw, mt, map->level, map->layer); + intel_resolve_map_remove(map); + resolved = true; } return resolved; @@ -2201,16 +2203,8 @@ intel_miptree_all_slices_resolve_color(struct brw_context *brw, struct intel_mipmap_tree *mt, int flags) { - if (!intel_miptree_needs_color_resolve(brw, mt, flags)) - return; - - foreach_list_typed_safe(struct intel_resolve_map, map, link, - &mt->color_resolve_map) { - assert(map->fast_clear_state != INTEL_FAST_CLEAR_STATE_RESOLVED); - brw_blorp_resolve_color(brw, mt, map->level, map->layer); - intel_resolve_map_remove(map); - } + intel_miptree_resolve_color(brw, mt, 0, UINT32_MAX, 0, UINT32_MAX, flags); } /** diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h index b3bd70d7edb..ac928e8f3be 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h @@ -937,8 +937,9 @@ intel_miptree_used_for_rendering(const struct brw_context *brw, bool intel_miptree_resolve_color(struct brw_context *brw, - struct intel_mipmap_tree *mt, unsigned level, - unsigned start_layer, unsigned num_layers, + struct intel_mipmap_tree *mt, + uint32_t start_level, uint32_t num_levels, + uint32_t start_layer, uint32_t num_layers, int flags); void |