diff options
| author | Rhys Perry <[email protected]> | 2020-01-03 17:38:23 +0000 |
|---|---|---|
| committer | Rhys Perry <[email protected]> | 2020-01-28 11:40:22 +0000 |
| commit | 21d2799cee8d5fa01b118a8afe595759b4f22cab (patch) | |
| tree | 747d6a4abf7e9a7a458b4cd9eec9f2f3c5a4e207 | |
| parent | d39f5519a11ca865506637a8b69cf6f2b7f5699a (diff) | |
aco: value-number MUBUF instructions
We will have to do this when we start creating MUBUF instructions for
load_input because NIR might not be able to tell they are identical since
it doesn't know whether two vertex attributes have the same offset.
No pipeline-db changes.
Signed-off-by: Rhys Perry <[email protected]>
Reviewed-by: Daniel Schürmann <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3086>
| -rw-r--r-- | src/amd/compiler/aco_opt_value_numbering.cpp | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/src/amd/compiler/aco_opt_value_numbering.cpp b/src/amd/compiler/aco_opt_value_numbering.cpp index 295a4343854..2f5a3b8eec9 100644 --- a/src/amd/compiler/aco_opt_value_numbering.cpp +++ b/src/amd/compiler/aco_opt_value_numbering.cpp @@ -184,7 +184,6 @@ struct InstrPred { aR->cluster_size == bR->cluster_size; } case Format::MTBUF: { - /* this is fine since they are only used for vertex input fetches */ MTBUF_instruction* aM = static_cast<MTBUF_instruction *>(a); MTBUF_instruction* bM = static_cast<MTBUF_instruction *>(b); return aM->can_reorder && bM->can_reorder && @@ -195,12 +194,27 @@ struct InstrPred { aM->offen == bM->offen && aM->idxen == bM->idxen && aM->glc == bM->glc && + aM->dlc == bM->dlc && aM->slc == bM->slc && aM->tfe == bM->tfe && aM->disable_wqm == bM->disable_wqm; } + case Format::MUBUF: { + MUBUF_instruction* aM = static_cast<MUBUF_instruction *>(a); + MUBUF_instruction* bM = static_cast<MUBUF_instruction *>(b); + return aM->can_reorder && bM->can_reorder && + aM->barrier == bM->barrier && + aM->offset == bM->offset && + aM->offen == bM->offen && + aM->idxen == bM->idxen && + aM->glc == bM->glc && + aM->dlc == bM->dlc && + aM->slc == bM->slc && + aM->tfe == bM->tfe && + aM->lds == bM->lds && + aM->disable_wqm == bM->disable_wqm; + } /* we want to optimize these in NIR and don't hassle with load-store dependencies */ - case Format::MUBUF: case Format::FLAT: case Format::GLOBAL: case Format::SCRATCH: |