diff options
| author | Kristian H. Kristensen <[email protected]> | 2019-12-09 19:27:38 -0800 |
|---|---|---|
| committer | Kristian H. Kristensen <[email protected]> | 2019-12-11 22:25:47 +0000 |
| commit | 201caa7281d714a44d50de5ab1dd2fe37e75795c (patch) | |
| tree | adf63a980828288b4daa5813ec122ab1b3b18478 | |
| parent | c71348f84ae46e93895b9bc965acfe6ec220058d (diff) | |
freedreno/a6xx: Convert VSC pipe setup to OUT_REG()
Reviewed-by: Eric Anholt <[email protected]>
Reviewed-by: Rob Clark <[email protected]>
Signed-off-by: Kristian H. Kristensen <[email protected]>
| -rw-r--r-- | src/gallium/drivers/freedreno/a6xx/fd6_gmem.c | 29 |
1 files changed, 13 insertions, 16 deletions
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c index fd6ce71947c..13d84d8d8ac 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c @@ -351,15 +351,12 @@ update_vsc_pipe(struct fd_batch *batch) DRM_FREEDRENO_GEM_TYPE_KMEM, "vsc_data2"); } - OUT_PKT4(ring, REG_A6XX_VSC_BIN_SIZE, 3); - OUT_RING(ring, A6XX_VSC_BIN_SIZE_WIDTH(gmem->bin_w) | - A6XX_VSC_BIN_SIZE_HEIGHT(gmem->bin_h)); - OUT_RELOCW(ring, fd6_ctx->vsc_data, - 32 * fd6_ctx->vsc_data_pitch, 0, 0); /* VSC_SIZE_ADDRESS_LO/HI */ + OUT_REG(ring, + A6XX_VSC_BIN_SIZE(.width = gmem->bin_w, .height = gmem->bin_h), + A6XX_VSC_SIZE_ADDRESS(.bo = fd6_ctx->vsc_data, .bo_offset = 32 * fd6_ctx->vsc_data_pitch)); - OUT_PKT4(ring, REG_A6XX_VSC_BIN_COUNT, 1); - OUT_RING(ring, A6XX_VSC_BIN_COUNT_NX(gmem->nbins_x) | - A6XX_VSC_BIN_COUNT_NY(gmem->nbins_y)); + OUT_REG(ring, A6XX_VSC_BIN_COUNT(.nx = gmem->nbins_x, + .ny = gmem->nbins_y)); OUT_PKT4(ring, REG_A6XX_VSC_PIPE_CONFIG_REG(0), 32); for (i = 0; i < 32; i++) { @@ -370,15 +367,15 @@ update_vsc_pipe(struct fd_batch *batch) A6XX_VSC_PIPE_CONFIG_REG_H(pipe->h)); } - OUT_PKT4(ring, REG_A6XX_VSC_PIPE_DATA2_ADDRESS_LO, 4); - OUT_RELOCW(ring, fd6_ctx->vsc_data2, 0, 0, 0); - OUT_RING(ring, fd6_ctx->vsc_data2_pitch); - OUT_RING(ring, fd_bo_size(fd6_ctx->vsc_data2)); + OUT_REG(ring, + A6XX_VSC_PIPE_DATA2_ADDRESS(.bo = fd6_ctx->vsc_data2), + A6XX_VSC_PIPE_DATA2_PITCH(.dword = fd6_ctx->vsc_data2_pitch), + A6XX_VSC_PIPE_DATA2_ARRAY_PITCH(.dword = fd_bo_size(fd6_ctx->vsc_data2))); - OUT_PKT4(ring, REG_A6XX_VSC_PIPE_DATA_ADDRESS_LO, 4); - OUT_RELOCW(ring, fd6_ctx->vsc_data, 0, 0, 0); - OUT_RING(ring, fd6_ctx->vsc_data_pitch); - OUT_RING(ring, fd_bo_size(fd6_ctx->vsc_data)); + OUT_REG(ring, + A6XX_VSC_PIPE_DATA_ADDRESS(.bo = fd6_ctx->vsc_data), + A6XX_VSC_PIPE_DATA_PITCH(.dword = fd6_ctx->vsc_data_pitch), + A6XX_VSC_PIPE_DATA_ARRAY_PITCH(.dword = fd_bo_size(fd6_ctx->vsc_data))); } /* TODO we probably have more than 8 scratch regs.. although the first |