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authorKenneth Graunke <[email protected]>2018-10-27 11:20:28 -0700
committerKenneth Graunke <[email protected]>2018-11-19 14:33:16 -0800
commit099016864259d162e0c08644fbe19e08abc586b6 (patch)
treee6bbbc29fb2ac304c69b39eaf49d6cab42b79d90
parent5b682143da1a24f4c66279fb5c6f9deefcb8a986 (diff)
i965: Allow only one slot of clip distances to be set on Gen4-5.
The existing backend code assumed that if VARYING_SLOT_CLIP_DIST0 was written, then VARYING_SLOT_CLIP_DIST1 would be as well. That's true with the current lowering, but not necessary if there are 4 or fewer clip distances. Separate out the checks to allow this. The new NIR-based lowering will trigger this case, which would have caused backend validation errors (src is null) without this patch. Reviewed-by: Eric Anholt <[email protected]>
-rw-r--r--src/intel/compiler/brw_vec4_visitor.cpp4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/intel/compiler/brw_vec4_visitor.cpp b/src/intel/compiler/brw_vec4_visitor.cpp
index b2bb2c6b82a..aea64c5b54d 100644
--- a/src/intel/compiler/brw_vec4_visitor.cpp
+++ b/src/intel/compiler/brw_vec4_visitor.cpp
@@ -1201,12 +1201,14 @@ vec4_visitor::emit_psiz_and_flags(dst_reg reg)
if (output_reg[VARYING_SLOT_CLIP_DIST0][0].file != BAD_FILE) {
current_annotation = "Clipping flags";
dst_reg flags0 = dst_reg(this, glsl_type::uint_type);
- dst_reg flags1 = dst_reg(this, glsl_type::uint_type);
emit(CMP(dst_null_f(), src_reg(output_reg[VARYING_SLOT_CLIP_DIST0][0]), brw_imm_f(0.0f), BRW_CONDITIONAL_L));
emit(VS_OPCODE_UNPACK_FLAGS_SIMD4X2, flags0, brw_imm_d(0));
emit(OR(header1_w, src_reg(header1_w), src_reg(flags0)));
+ }
+ if (output_reg[VARYING_SLOT_CLIP_DIST1][0].file != BAD_FILE) {
+ dst_reg flags1 = dst_reg(this, glsl_type::uint_type);
emit(CMP(dst_null_f(), src_reg(output_reg[VARYING_SLOT_CLIP_DIST1][0]), brw_imm_f(0.0f), BRW_CONDITIONAL_L));
emit(VS_OPCODE_UNPACK_FLAGS_SIMD4X2, flags1, brw_imm_d(0));
emit(SHL(flags1, src_reg(flags1), brw_imm_d(4)));