diff options
| author | Francisco Jerez <[email protected]> | 2020-04-28 15:06:18 -0700 |
|---|---|---|
| committer | Marge Bot <[email protected]> | 2020-04-29 23:40:36 +0000 |
| commit | 0842758ec0fe716f6559ca630cb8704cf7fb97bf (patch) | |
| tree | 827e11821b72426ec2ceb425a756d174ce179613 | |
| parent | 82aa4460492200c621a2f35c93519230b69dbc18 (diff) | |
intel/ir: Update performance analysis parameters for memory fence codegen changes.
The SFID field of the SHADER_OPCODE_MEMORY_FENCE and
SHADER_OPCODE_INTERLOCK instructions now indicates the target function
of the memory fence. Account the cycle-count cost to the right shared
unit.
Fixes: f858fa26b4cca8834c8687f01d2ba431fcc8e006 ("intel/fs,vec4: Pull stall logic for memory fences up into the IR")
Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4817>
| -rw-r--r-- | src/intel/compiler/brw_ir_performance.cpp | 22 |
1 files changed, 18 insertions, 4 deletions
diff --git a/src/intel/compiler/brw_ir_performance.cpp b/src/intel/compiler/brw_ir_performance.cpp index 5785d839e3a..8d02db932ba 100644 --- a/src/intel/compiler/brw_ir_performance.cpp +++ b/src/intel/compiler/brw_ir_performance.cpp @@ -934,11 +934,25 @@ namespace { case SHADER_OPCODE_MEMORY_FENCE: case SHADER_OPCODE_INTERLOCK: - if (devinfo->gen >= 7) - return calculate_desc(info, unit_dp_dc, 2, 0, 0, 30 /* XXX */, 0, - 10 /* XXX */, 100 /* XXX */, 0, 0, 0, 0); - else + switch (info.sfid) { + case GEN6_SFID_DATAPORT_RENDER_CACHE: + if (devinfo->gen >= 7) + return calculate_desc(info, unit_dp_rc, 2, 0, 0, 30 /* XXX */, 0, + 10 /* XXX */, 300 /* XXX */, 0, 0, 0, 0); + else + abort(); + + case GEN7_SFID_DATAPORT_DATA_CACHE: + case HSW_SFID_DATAPORT_DATA_CACHE_1: + if (devinfo->gen >= 7) + return calculate_desc(info, unit_dp_dc, 2, 0, 0, 30 /* XXX */, 0, + 10 /* XXX */, 100 /* XXX */, 0, 0, 0, 0); + else + abort(); + + default: abort(); + } case SHADER_OPCODE_GEN4_SCRATCH_READ: case SHADER_OPCODE_GEN4_SCRATCH_WRITE: |